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airliedairlied
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Merge tag 'drm-intel-gt-next-2023-08-11' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Cross-subsystem Changes: - Backmerge of drm-next Driver Changes: - Apply workaround 22016122933 correctly (Jonathan, Matt R) - Simplify shmem_create_from_object map_type selection (Jonathan, Tvrtko) - Make i915_coherent_map_type GT-centric (Jonathan, Matt R) - Selftest improvements (John) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZNYR3bKFquGc7u9w@jlahtine-mobl.ger.corp.intel.com
2 parents 2b9d7b6 + 788568f commit 57bca71

23 files changed

+75
-69
lines changed

‎drivers/gpu/drm/i915/display/intel_hdcp_gsc.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
#include <drm/i915_hdcp_interface.h>
77

88
#include "gem/i915_gem_region.h"
9+
#include "gt/intel_gt.h"
910
#include "gt/uc/intel_gsc_uc_heci_cmd_submit.h"
1011
#include "i915_drv.h"
1112
#include "i915_utils.h"
@@ -632,7 +633,7 @@ static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915,
632633
return PTR_ERR(obj);
633634
}
634635

635-
cmd_in = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
636+
cmd_in = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, true));
636637
if (IS_ERR(cmd_in)) {
637638
drm_err(&i915->drm, "Failed to map gsc message page!\n");
638639
err = PTR_ERR(cmd_in);

‎drivers/gpu/drm/i915/gem/i915_gem_object.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -716,10 +716,6 @@ void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
716716
void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
717717
enum i915_map_type type);
718718

719-
enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
720-
struct drm_i915_gem_object *obj,
721-
bool always_coherent);
722-
723719
void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
724720
unsigned long offset,
725721
unsigned long size);

‎drivers/gpu/drm/i915/gem/i915_gem_pages.c

Lines changed: 0 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -468,21 +468,6 @@ void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
468468
return ret;
469469
}
470470

471-
enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
472-
struct drm_i915_gem_object *obj,
473-
bool always_coherent)
474-
{
475-
/*
476-
* Wa_22016122933: always return I915_MAP_WC for MTL
477-
*/
478-
if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(i915))
479-
return I915_MAP_WC;
480-
if (HAS_LLC(i915) || always_coherent)
481-
return I915_MAP_WB;
482-
else
483-
return I915_MAP_WC;
484-
}
485-
486471
void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
487472
unsigned long offset,
488473
unsigned long size)

‎drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -13,12 +13,12 @@
1313
#include "selftests/igt_spinner.h"
1414

1515
static int igt_fill_check_buffer(struct drm_i915_gem_object *obj,
16+
struct intel_gt *gt,
1617
bool fill)
1718
{
18-
struct drm_i915_private *i915 = to_i915(obj->base.dev);
1919
unsigned int i, count = obj->base.size / sizeof(u32);
2020
enum i915_map_type map_type =
21-
i915_coherent_map_type(i915, obj, false);
21+
intel_gt_coherent_map_type(gt, obj, false);
2222
u32 *cur;
2323
int err = 0;
2424

@@ -66,7 +66,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
6666
if (err)
6767
continue;
6868

69-
err = igt_fill_check_buffer(obj, true);
69+
err = igt_fill_check_buffer(obj, gt, true);
7070
if (err)
7171
continue;
7272

@@ -86,7 +86,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
8686
if (err)
8787
continue;
8888

89-
err = igt_fill_check_buffer(obj, false);
89+
err = igt_fill_check_buffer(obj, gt, false);
9090
}
9191
i915_gem_object_put(obj);
9292

@@ -233,7 +233,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
233233
continue;
234234

235235
if (!vma) {
236-
err = igt_fill_check_buffer(obj, true);
236+
err = igt_fill_check_buffer(obj, gt, true);
237237
if (err)
238238
continue;
239239
}
@@ -276,7 +276,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
276276
if (err)
277277
goto out_unlock;
278278
} else {
279-
err = igt_fill_check_buffer(obj, false);
279+
err = igt_fill_check_buffer(obj, gt, false);
280280
}
281281

282282
out_unlock:

‎drivers/gpu/drm/i915/gt/intel_engine_pm.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ static void dbg_poison_ce(struct intel_context *ce)
3939

4040
if (ce->state) {
4141
struct drm_i915_gem_object *obj = ce->state->obj;
42-
int type = i915_coherent_map_type(ce->engine->i915, obj, true);
42+
int type = intel_gt_coherent_map_type(ce->engine->gt, obj, true);
4343
void *map;
4444

4545
if (!i915_gem_object_trylock(obj, NULL))

‎drivers/gpu/drm/i915/gt/intel_gt.c

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1003,3 +1003,19 @@ void intel_gt_info_print(const struct intel_gt_info *info,
10031003

10041004
intel_sseu_dump(&info->sseu, p);
10051005
}
1006+
1007+
enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
1008+
struct drm_i915_gem_object *obj,
1009+
bool always_coherent)
1010+
{
1011+
/*
1012+
* Wa_22016122933: always return I915_MAP_WC for Media
1013+
* version 13.0 when the object is on the Media GT
1014+
*/
1015+
if (i915_gem_object_is_lmem(obj) || intel_gt_needs_wa_22016122933(gt))
1016+
return I915_MAP_WC;
1017+
if (HAS_LLC(gt->i915) || always_coherent)
1018+
return I915_MAP_WB;
1019+
else
1020+
return I915_MAP_WC;
1021+
}

‎drivers/gpu/drm/i915/gt/intel_gt.h

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
#ifndef __INTEL_GT__
77
#define __INTEL_GT__
88

9+
#include "i915_drv.h"
910
#include "intel_engine_types.h"
1011
#include "intel_gt_types.h"
1112
#include "intel_reset.h"
@@ -24,6 +25,11 @@ static inline bool gt_is_root(struct intel_gt *gt)
2425
return !gt->info.id;
2526
}
2627

28+
static inline bool intel_gt_needs_wa_22016122933(struct intel_gt *gt)
29+
{
30+
return MEDIA_VER_FULL(gt->i915) == IP_VER(13, 0) && gt->type == GT_MEDIA;
31+
}
32+
2733
static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
2834
{
2935
return container_of(uc, struct intel_gt, uc);
@@ -107,4 +113,8 @@ void intel_gt_info_print(const struct intel_gt_info *info,
107113

108114
void intel_gt_watchdog_work(struct work_struct *work);
109115

116+
enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
117+
struct drm_i915_gem_object *obj,
118+
bool always_coherent);
119+
110120
#endif /* __INTEL_GT_H__ */

‎drivers/gpu/drm/i915/gt/intel_gtt.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,7 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
8989
enum i915_map_type type;
9090
void *vaddr;
9191

92-
type = i915_coherent_map_type(vm->i915, obj, true);
92+
type = intel_gt_coherent_map_type(vm->gt, obj, true);
9393
vaddr = i915_gem_object_pin_map_unlocked(obj, type);
9494
if (IS_ERR(vaddr))
9595
return PTR_ERR(vaddr);
@@ -103,7 +103,7 @@ int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object
103103
enum i915_map_type type;
104104
void *vaddr;
105105

106-
type = i915_coherent_map_type(vm->i915, obj, true);
106+
type = intel_gt_coherent_map_type(vm->gt, obj, true);
107107
vaddr = i915_gem_object_pin_map(obj, type);
108108
if (IS_ERR(vaddr))
109109
return PTR_ERR(vaddr);

‎drivers/gpu/drm/i915/gt/intel_lrc.c

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1095,10 +1095,11 @@ __lrc_alloc_state(struct intel_context *ce, struct intel_engine_cs *engine)
10951095
if (IS_ERR(obj)) {
10961096
obj = i915_gem_object_create_shmem(engine->i915, context_size);
10971097
/*
1098-
* Wa_22016122933: For MTL the shared memory needs to be mapped
1099-
* as WC on CPU side and UC (PAT index 2) on GPU side
1098+
* Wa_22016122933: For Media version 13.0, all Media GT shared
1099+
* memory needs to be mapped as WC on CPU side and UC (PAT
1100+
* index 2) on GPU side.
11001101
*/
1101-
if (IS_METEORLAKE(engine->i915))
1102+
if (intel_gt_needs_wa_22016122933(engine->gt))
11021103
i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
11031104
}
11041105
if (IS_ERR(obj))
@@ -1191,9 +1192,9 @@ lrc_pre_pin(struct intel_context *ce,
11911192
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
11921193

11931194
*vaddr = i915_gem_object_pin_map(ce->state->obj,
1194-
i915_coherent_map_type(ce->engine->i915,
1195-
ce->state->obj,
1196-
false) |
1195+
intel_gt_coherent_map_type(ce->engine->gt,
1196+
ce->state->obj,
1197+
false) |
11971198
I915_MAP_OVERRIDE);
11981199

11991200
return PTR_ERR_OR_ZERO(*vaddr);

‎drivers/gpu/drm/i915/gt/intel_ring.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
1313
#include "intel_engine_regs.h"
1414
#include "intel_gpu_commands.h"
1515
#include "intel_ring.h"
16+
#include "intel_gt.h"
1617
#include "intel_timeline.h"
1718

1819
unsigned int intel_ring_update_space(struct intel_ring *ring)
@@ -56,7 +57,7 @@ int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww)
5657
if (i915_vma_is_map_and_fenceable(vma) && !HAS_LLC(vma->vm->i915)) {
5758
addr = (void __force *)i915_vma_pin_iomap(vma);
5859
} else {
59-
int type = i915_coherent_map_type(vma->vm->i915, vma->obj, false);
60+
int type = intel_gt_coherent_map_type(vma->vm->gt, vma->obj, false);
6061

6162
addr = i915_gem_object_pin_map(vma->obj, type);
6263
}

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