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KVM: x86/pmu: Limit the maximum number of supported AMD GP counters
The AMD PerfMonV2 specification allows for a maximum of 16 GP counters, but currently only 6 pairs of MSRs are accepted by KVM. While AMD64_NUM_COUNTERS_CORE is already equal to 6, increasing without adjusting msrs_to_save_all[] could result in out-of-bounds accesses. Therefore introduce a macro (named KVM_AMD_PMC_MAX_GENERIC) to refer to the number of counters supported by KVM. Signed-off-by: Like Xu <likexu@tencent.com> Reviewed-by: Jim Mattson <jmattson@google.com> Message-Id: <20220919091008.60695-3-likexu@tencent.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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arch/x86/include/asm/kvm_host.h

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Original file line numberDiff line numberDiff line change
@@ -506,6 +506,7 @@ struct kvm_pmc {
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#define MSR_ARCH_PERFMON_PERFCTR_MAX (MSR_ARCH_PERFMON_PERFCTR0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
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#define MSR_ARCH_PERFMON_EVENTSEL_MAX (MSR_ARCH_PERFMON_EVENTSEL0 + KVM_INTEL_PMC_MAX_GENERIC - 1)
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#define KVM_PMC_MAX_FIXED 3
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#define KVM_AMD_PMC_MAX_GENERIC 6
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struct kvm_pmu {
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unsigned nr_arch_gp_counters;
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unsigned nr_arch_fixed_counters;

arch/x86/kvm/svm/pmu.c

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -192,9 +192,10 @@ static void amd_pmu_init(struct kvm_vcpu *vcpu)
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struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
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int i;
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BUILD_BUG_ON(AMD64_NUM_COUNTERS_CORE > INTEL_PMC_MAX_GENERIC);
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BUILD_BUG_ON(KVM_AMD_PMC_MAX_GENERIC > AMD64_NUM_COUNTERS_CORE);
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BUILD_BUG_ON(KVM_AMD_PMC_MAX_GENERIC > INTEL_PMC_MAX_GENERIC);
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for (i = 0; i < AMD64_NUM_COUNTERS_CORE ; i++) {
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for (i = 0; i < KVM_AMD_PMC_MAX_GENERIC ; i++) {
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pmu->gp_counters[i].type = KVM_PMC_GP;
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pmu->gp_counters[i].vcpu = vcpu;
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pmu->gp_counters[i].idx = i;
@@ -207,7 +208,7 @@ static void amd_pmu_reset(struct kvm_vcpu *vcpu)
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struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
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int i;
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for (i = 0; i < AMD64_NUM_COUNTERS_CORE; i++) {
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for (i = 0; i < KVM_AMD_PMC_MAX_GENERIC; i++) {
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struct kvm_pmc *pmc = &pmu->gp_counters[i];
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pmc_stop_counter(pmc);

arch/x86/kvm/x86.c

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Original file line numberDiff line numberDiff line change
@@ -1452,10 +1452,13 @@ static const u32 msrs_to_save_all[] = {
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MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
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MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
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/* This part of MSRs should match KVM_AMD_PMC_MAX_GENERIC. */
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MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
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MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
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MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
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MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
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MSR_IA32_XFD, MSR_IA32_XFD_ERR,
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};
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