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Russell King (Oracle)
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Merge tag 'arm-vfp-refactor-for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/ardb/linux into devel-stable
Refactor VFP support code and reimplement in C The VFP related changes to permit kernel mode NEON in softirq context resulted in some issues regarding en/disabling of sofirqs from asm code, and this made it clear that it would be better to handle more of it from C code. Given that we already have infrastructure that associates undefined instruction exceptions with handler code based on value/mask pairs, we can easily move the dispatch of VFP and NEON instructions to C code once we reimplement the actual VFP support routine (which reasons about how to deal with the exception and whether any emulation is needed) in C code first. With those out of the way, we can drop the partial decoding logic in asm that reasons about which ISA is being used by user space, as the remaining cases are all 32-bit ARM only. This leaves a FPE specific routine with some iWMMXT logic that is easily duplicated in C as well, allowing us to move the FPE asm code into the FPE asm source file, and out of the shared entry code.
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Documentation/block/index.rst

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kyber-iosched
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null_blk
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pr
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request
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stat
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switching-sched
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writeback_cache_control

Documentation/block/request.rst

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This file was deleted.

Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml

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properties:
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data-lanes:
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minItems: 1
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maxItems: 2
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required:

Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml

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properties:
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clocks:
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minItems: 3
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items:
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- description: PCIe bridge clock.
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- description: PCIe bus clock.
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- description: PCIe PHY clock.
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- description: Additional required clock entry for imx6sx-pcie,
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imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
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maxItems: 4
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clock-names:
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minItems: 3
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items:
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- const: pcie
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- const: pcie_bus
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- enum: [ pcie_phy, pcie_aux ]
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- enum: [ pcie_inbound_axi, pcie_aux ]
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maxItems: 4
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num-lanes:
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const: 1

Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml

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- const: dbi
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- const: addr_space
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clocks:
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minItems: 3
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items:
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- description: PCIe bridge clock.
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- description: PCIe bus clock.
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- description: PCIe PHY clock.
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- description: Additional required clock entry for imx6sx-pcie,
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imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
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clock-names:
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minItems: 3
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maxItems: 4
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interrupts:
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items:
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- description: builtin eDMA interrupter.
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- $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
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- $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml#
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- if:
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properties:
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compatible:
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enum:
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- fsl,imx8mq-pcie-ep
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then:
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properties:
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clocks:
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minItems: 4
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clock-names:
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items:
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- const: pcie
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- const: pcie_bus
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- const: pcie_phy
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- const: pcie_aux
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else:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: pcie
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- const: pcie_bus
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- const: pcie_aux
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unevaluatedProperties: false
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Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml

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- const: dbi
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- const: config
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clocks:
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minItems: 3
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items:
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- description: PCIe bridge clock.
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- description: PCIe bus clock.
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- description: PCIe PHY clock.
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- description: Additional required clock entry for imx6sx-pcie,
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imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
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clock-names:
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minItems: 3
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maxItems: 4
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- $ref: /schemas/pci/snps,dw-pcie.yaml#
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- $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml#
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- if:
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properties:
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compatible:
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enum:
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- fsl,imx6sx-pcie
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then:
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properties:
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clocks:
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minItems: 4
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clock-names:
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items:
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- const: pcie
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- const: pcie_bus
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- const: pcie_phy
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- const: pcie_inbound_axi
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- if:
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properties:
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compatible:
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enum:
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- fsl,imx8mq-pcie
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then:
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properties:
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clocks:
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minItems: 4
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clock-names:
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items:
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- const: pcie
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- const: pcie_bus
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- const: pcie_phy
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- const: pcie_aux
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- if:
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properties:
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compatible:
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enum:
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- fsl,imx6q-pcie
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- fsl,imx6qp-pcie
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- fsl,imx7d-pcie
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then:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: pcie
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- const: pcie_bus
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- const: pcie_phy
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- if:
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properties:
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compatible:
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enum:
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- fsl,imx8mm-pcie
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- fsl,imx8mp-pcie
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properties:
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clock-names:
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- const: pcie
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- const: pcie_bus
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- const: pcie_aux
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Documentation/networking/bonding.rst

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Specify the delay, in milliseconds, between each peer
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notification (gratuitous ARP and unsolicited IPv6 Neighbor
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Advertisement) when they are issued after a failover event.
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This delay should be a multiple of the link monitor interval
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(arp_interval or miimon, whichever is active). The default
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value is 0 which means to match the value of the link monitor
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interval.
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This delay should be a multiple of the MII link monitor interval
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(miimon).
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The valid range is 0 - 300000. The default value is 0, which means
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to match the value of the MII link monitor interval.
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prio
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Slave priority. A higher number means higher priority.

Documentation/networking/index.rst

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udplite
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vrf
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vxlan
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x25-iface
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x25
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x25-iface
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xfrm_device
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xfrm_proc
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xfrm_sync

Documentation/networking/x25-iface.rst

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.. SPDX-License-Identifier: GPL-2.0
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============================-
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X.25 Device Driver Interface
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============================-
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============================
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Version 1.1
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