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Merge tag 'mailbox-v5.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jassi Brar: "qcom: - add support for MSM8976 mtk: - enable mt8186 - add ADSP controller driver ti: - use poll mode during suspend tegra: - fix tx channel flush imx: - add i.MX8 SECO MU support - prepare for, and add iMX93 support" * tag 'mailbox-v5.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration: dt-bindings: mailbox: add definition for mt8186 mailbox: ti-msgmgr: Operate mailbox in polled mode during system suspend mailbox: ti-msgmgr: Refactor message read during interrupt handler mailbox: imx: support i.MX93 S401 MU mailbox: imx: support dual interrupts mailbox: imx: extend irq to an array dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support dt-bindings: mailbox: imx-mu: add i.MX93 MU mailbox: imx: add i.MX8 SECO MU support mailbox: imx: introduce rxdb callback dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support mailbox: imx: enlarge timeout while reading/writing messages to SCFW mailbox: imx: fix crash in resume on i.mx8ulp mailbox: imx: fix wakeup failure from freeze mode mailbox: mediatek: add support for adsp mailbox controller dt-bindings: mailbox: mtk,adsp-mbox: add mtk adsp-mbox document mailbox: qcom-apcs-ipc: Add compatible for MSM8976 SoC dt-bindings: mailbox: Add compatible for the MSM8976 mailbox: tegra-hsp: Flush whole channel
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Documentation/devicetree/bindings/mailbox/fsl,mu.yaml

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@@ -28,7 +28,12 @@ properties:
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- const: fsl,imx7ulp-mu
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- const: fsl,imx8ulp-mu
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- const: fsl,imx8-mu-scu
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- const: fsl,imx8-mu-seco
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- const: fsl,imx93-mu-s4
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- const: fsl,imx8ulp-mu-s4
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- items:
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- const: fsl,imx93-mu
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- const: fsl,imx8ulp-mu
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- items:
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- enum:
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- fsl,imx7s-mu
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maxItems: 1
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interrupts:
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maxItems: 1
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minItems: 1
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maxItems: 2
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interrupt-names:
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minItems: 1
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items:
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- const: tx
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- const: rx
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"#mbox-cells":
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description: |
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- interrupts
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- "#mbox-cells"
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allOf:
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- if:
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properties:
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compatible:
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enum:
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- fsl,imx93-mu-s4
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then:
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properties:
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interrupt-names:
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minItems: 2
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interrupts:
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minItems: 2
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else:
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properties:
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interrupts:
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maxItems: 1
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not:
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required:
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- interrupt-names
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additionalProperties: false
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examples:
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mailbox/mtk,adsp-mbox.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek ADSP mailbox
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maintainers:
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- Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>
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description: |
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The MTK ADSP mailbox Inter-Processor Communication (IPC) enables the SoC
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to ommunicate with ADSP by passing messages through two mailbox channels.
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The MTK ADSP mailbox IPC also provides the ability for one processor to
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signal the other processor using interrupts.
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properties:
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compatible:
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items:
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- const: mediatek,mt8195-adsp-mbox
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"#mbox-cells":
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const: 0
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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required:
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- compatible
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- "#mbox-cells"
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- reg
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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adsp_mailbox0:mailbox@10816000 {
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compatible = "mediatek,mt8195-adsp-mbox";
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#mbox-cells = <0>;
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reg = <0x10816000 0x1000>;
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interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
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};

Documentation/devicetree/bindings/mailbox/mtk-gce.txt

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@@ -10,7 +10,8 @@ mailbox.txt for generic information about mailbox device-tree bindings.
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Required properties:
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- compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce",
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"mediatek,mt8192-gce", "mediatek,mt8195-gce" or "mediatek,mt6779-gce".
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"mediatek,mt8186-gce", "mediatek,mt8192-gce", "mediatek,mt8195-gce" or
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"mediatek,mt6779-gce".
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- reg: Address range of the GCE unit
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- interrupts: The interrupt signal from the GCE block
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- clock: Clocks according to the common clock binding
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defined in 'dt-bindings/gce/<chip>-gce.h'.
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Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h',
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'dt-bindings/gce/mt8183-gce.h', 'dt-bindings/gce/mt8192-gce.h',
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'dt-bindings/gce/mt8195-gce.h' or 'dt-bindings/gce/mt6779-gce.h'.
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'dt-bindings/gce/mt8183-gce.h', 'dt-bindings/gce/mt8186-gce.h'
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'dt-bindings/gce/mt8192-gce.h', 'dt-bindings/gce/mt8195-gce.h' or
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'dt-bindings/gce/mt6779-gce.h'.
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Such as sub-system ids, thread priority, event ids.
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Example:

Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml

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- qcom,msm8916-apcs-kpss-global
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- qcom,msm8939-apcs-kpss-global
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- qcom,msm8953-apcs-kpss-global
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- qcom,msm8976-apcs-kpss-global
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- qcom,msm8994-apcs-kpss-global
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- qcom,msm8996-apcs-hmss-global
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- qcom,msm8998-apcs-hmss-global

drivers/mailbox/Kconfig

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@@ -238,6 +238,15 @@ config STM32_IPCC
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with hardware for Inter-Processor Communication Controller (IPCC)
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between processors. Say Y here if you want to have this support.
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config MTK_ADSP_MBOX
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tristate "MediaTek ADSP Mailbox Controller"
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depends on ARCH_MEDIATEK || COMPILE_TEST
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help
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Say yes here to add support for "MediaTek ADSP Mailbox Controller.
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This mailbox driver is used to send notification or short message
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between processors with ADSP. It will place the message to share
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buffer and will access the ipc control.
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config MTK_CMDQ_MBOX
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tristate "MediaTek CMDQ Mailbox Support"
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depends on ARCH_MEDIATEK || COMPILE_TEST

drivers/mailbox/Makefile

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@@ -49,6 +49,8 @@ obj-$(CONFIG_TEGRA_HSP_MBOX) += tegra-hsp.o
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obj-$(CONFIG_STM32_IPCC) += stm32-ipcc.o
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obj-$(CONFIG_MTK_ADSP_MBOX) += mtk-adsp-mailbox.o
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obj-$(CONFIG_MTK_CMDQ_MBOX) += mtk-cmdq-mailbox.o
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obj-$(CONFIG_ZYNQMP_IPI_MBOX) += zynqmp-ipi-mailbox.o

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