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LoongArch/smp: Call rcutree_report_cpu_starting() at tlb_init()
Machines which have more than 8 nodes fail to boot SMP after commit a2ccf46 ("LoongArch/smp: Call rcutree_report_cpu_starting() earlier"). Because such machines use tlb-based per-cpu base address rather than dmw-based per-cpu base address, resulting per-cpu variables can only be accessed after tlb_init(). But rcutree_report_cpu_starting() is now called before tlb_init() and accesses per-cpu variables indeed. Since the original patch want to avoid the lockdep warning caused by page allocation in tlb_init(), we can move rcutree_report_cpu_starting() to tlb_init() where after tlb exception configuration but before page allocation. Fixes: a2ccf46 ("LoongArch/smp: Call rcutree_report_cpu_starting() earlier") Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
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2 files changed

+10
-7
lines changed

2 files changed

+10
-7
lines changed

arch/loongarch/kernel/smp.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -509,7 +509,6 @@ asmlinkage void start_secondary(void)
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sync_counter();
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cpu = raw_smp_processor_id();
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set_my_cpu_offset(per_cpu_offset(cpu));
512-
rcutree_report_cpu_starting(cpu);
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cpu_probe();
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constant_clockevent_init();

arch/loongarch/mm/tlb.c

Lines changed: 10 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -284,12 +284,16 @@ static void setup_tlb_handler(int cpu)
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set_handler(EXCCODE_TLBNR * VECSIZE, handle_tlb_protect, VECSIZE);
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set_handler(EXCCODE_TLBNX * VECSIZE, handle_tlb_protect, VECSIZE);
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set_handler(EXCCODE_TLBPE * VECSIZE, handle_tlb_protect, VECSIZE);
287-
}
287+
} else {
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int vec_sz __maybe_unused;
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void *addr __maybe_unused;
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struct page *page __maybe_unused;
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292+
/* Avoid lockdep warning */
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rcutree_report_cpu_starting(cpu);
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#ifdef CONFIG_NUMA
289-
else {
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void *addr;
291-
struct page *page;
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const int vec_sz = sizeof(exception_handlers);
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vec_sz = sizeof(exception_handlers);
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if (pcpu_handlers[cpu])
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return;
@@ -305,8 +309,8 @@ static void setup_tlb_handler(int cpu)
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csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_EENTRY);
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csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_MERRENTRY);
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csr_write64(pcpu_handlers[cpu] + 80*VECSIZE, LOONGARCH_CSR_TLBRENTRY);
308-
}
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#endif
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}
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}
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void tlb_init(int cpu)

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