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tlebWolfram Sang
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i2c: nomadik: support >=1MHz speed modes
- BRCR value must go into the BRCR1 field when in high-speed mode. It goes into BRCR2 otherwise. - Remove fallback to standard mode if priv->sm > I2C_FREQ_MODE_FAST. - Set SM properly in probe; previously it only checked STANDARD versus FAST. Now we set STANDARD, FAST, FAST_PLUS or HIGH_SPEED. - Remove all comment sections saying we only support low-speeds. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
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drivers/i2c/busses/i2c-nomadik.c

Lines changed: 16 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -397,7 +397,7 @@ static u32 load_i2c_mcr_reg(struct nmk_i2c_dev *priv, u16 flags)
397397
*/
398398
static void setup_i2c_controller(struct nmk_i2c_dev *priv)
399399
{
400-
u32 brcr1, brcr2;
400+
u32 brcr;
401401
u32 i2c_clk, div;
402402
u32 ns;
403403
u16 slsu;
@@ -444,42 +444,31 @@ static void setup_i2c_controller(struct nmk_i2c_dev *priv)
444444
/*
445445
* The spec says, in case of std. mode the divider is
446446
* 2 whereas it is 3 for fast and fastplus mode of
447-
* operation. TODO - high speed support.
447+
* operation.
448448
*/
449449
div = (priv->clk_freq > I2C_MAX_STANDARD_MODE_FREQ) ? 3 : 2;
450450

451451
/*
452452
* generate the mask for baud rate counters. The controller
453453
* has two baud rate counters. One is used for High speed
454454
* operation, and the other is for std, fast mode, fast mode
455-
* plus operation. Currently we do not supprt high speed mode
456-
* so set brcr1 to 0.
455+
* plus operation.
457456
*
458457
* BRCR is a clock divider amount. Pick highest value that
459458
* leads to rate strictly below target. Eg when asking for
460459
* 400kHz you want a bus rate <=400kHz (and not >=400kHz).
461460
*/
462-
brcr1 = FIELD_PREP(I2C_BRCR_BRCNT1, 0);
463-
brcr2 = FIELD_PREP(I2C_BRCR_BRCNT2, DIV_ROUND_UP(i2c_clk, priv->clk_freq * div));
461+
brcr = DIV_ROUND_UP(i2c_clk, priv->clk_freq * div);
462+
463+
if (priv->sm == I2C_FREQ_MODE_HIGH_SPEED)
464+
brcr = FIELD_PREP(I2C_BRCR_BRCNT1, brcr);
465+
else
466+
brcr = FIELD_PREP(I2C_BRCR_BRCNT2, brcr);
464467

465468
/* set the baud rate counter register */
466-
writel((brcr1 | brcr2), priv->virtbase + I2C_BRCR);
469+
writel(brcr, priv->virtbase + I2C_BRCR);
467470

468-
/*
469-
* set the speed mode. Currently we support
470-
* only standard and fast mode of operation
471-
* TODO - support for fast mode plus (up to 1Mb/s)
472-
* and high speed (up to 3.4 Mb/s)
473-
*/
474-
if (priv->sm > I2C_FREQ_MODE_FAST) {
475-
dev_err(&priv->adev->dev,
476-
"do not support this mode defaulting to std. mode\n");
477-
brcr2 = FIELD_PREP(I2C_BRCR_BRCNT2,
478-
i2c_clk / (I2C_MAX_STANDARD_MODE_FREQ * 2));
479-
writel((brcr1 | brcr2), priv->virtbase + I2C_BRCR);
480-
writel(FIELD_PREP(I2C_CR_SM, I2C_FREQ_MODE_STANDARD),
481-
priv->virtbase + I2C_CR);
482-
}
471+
/* set the speed mode */
483472
writel(FIELD_PREP(I2C_CR_SM, priv->sm), priv->virtbase + I2C_CR);
484473

485474
/* set the Tx and Rx FIFO threshold */
@@ -1020,11 +1009,14 @@ static void nmk_i2c_of_probe(struct device_node *np,
10201009
if (of_property_read_u32(np, "clock-frequency", &priv->clk_freq))
10211010
priv->clk_freq = I2C_MAX_STANDARD_MODE_FREQ;
10221011

1023-
/* This driver only supports 'standard' and 'fast' modes of operation. */
10241012
if (priv->clk_freq <= I2C_MAX_STANDARD_MODE_FREQ)
10251013
priv->sm = I2C_FREQ_MODE_STANDARD;
1026-
else
1014+
else if (priv->clk_freq <= I2C_MAX_FAST_MODE_FREQ)
10271015
priv->sm = I2C_FREQ_MODE_FAST;
1016+
else if (priv->clk_freq <= I2C_MAX_FAST_MODE_PLUS_FREQ)
1017+
priv->sm = I2C_FREQ_MODE_FAST_PLUS;
1018+
else
1019+
priv->sm = I2C_FREQ_MODE_HIGH_SPEED;
10281020
priv->tft = 1; /* Tx FIFO threshold */
10291021
priv->rft = 8; /* Rx FIFO threshold */
10301022

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