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dhananjay-AMDPeter Zijlstra
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perf/x86/rapl: Fix the error checking order
After the commit b4943b8 ("perf/x86/rapl: Add core energy counter support for AMD CPUs"), the default "perf record"/"perf top" command is broken in systems where there isn't a PMU registered for type PERF_TYPE_RAW. This is due to the change in order of error checks in rapl_pmu_event_init() Due to which we return -EINVAL instead of -ENOENT, when we reach here from the fallback loop in perf_init_event(). Move the "PMU and event type match" back to the beginning of the function so that we return -ENOENT early on. Closes: https://lore.kernel.org/all/uv7mz6vew2bzgre5jdpmwldxljp5djzmuiksqdcdwipfm4zm7w@ribobcretidk/ Fixes: b4943b8 ("perf/x86/rapl: Add core energy counter support for AMD CPUs") Reported-by: Koichiro Den <koichiro.den@canonical.com> Signed-off-by: Dhananjay Ugwekar <dhananjay.ugwekar@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20250129080513.30353-1-dhananjay.ugwekar@amd.com
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arch/x86/events/rapl.c

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -370,6 +370,10 @@ static int rapl_pmu_event_init(struct perf_event *event)
370370
unsigned int rapl_pmu_idx;
371371
struct rapl_pmus *rapl_pmus;
372372

373+
/* only look at RAPL events */
374+
if (event->attr.type != event->pmu->type)
375+
return -ENOENT;
376+
373377
/* unsupported modes and filters */
374378
if (event->attr.sample_period) /* no sampling */
375379
return -EINVAL;
@@ -387,21 +391,13 @@ static int rapl_pmu_event_init(struct perf_event *event)
387391
rapl_pmus_scope = rapl_pmus->pmu.scope;
388392

389393
if (rapl_pmus_scope == PERF_PMU_SCOPE_PKG || rapl_pmus_scope == PERF_PMU_SCOPE_DIE) {
390-
/* only look at RAPL package events */
391-
if (event->attr.type != rapl_pmus_pkg->pmu.type)
392-
return -ENOENT;
393-
394394
cfg = array_index_nospec((long)cfg, NR_RAPL_PKG_DOMAINS + 1);
395395
if (!cfg || cfg >= NR_RAPL_PKG_DOMAINS + 1)
396396
return -EINVAL;
397397

398398
bit = cfg - 1;
399399
event->hw.event_base = rapl_model->rapl_pkg_msrs[bit].msr;
400400
} else if (rapl_pmus_scope == PERF_PMU_SCOPE_CORE) {
401-
/* only look at RAPL core events */
402-
if (event->attr.type != rapl_pmus_core->pmu.type)
403-
return -ENOENT;
404-
405401
cfg = array_index_nospec((long)cfg, NR_RAPL_CORE_DOMAINS + 1);
406402
if (!cfg || cfg >= NR_RAPL_PKG_DOMAINS + 1)
407403
return -EINVAL;

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