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airliedairlied
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Merge tag 'amd-drm-fixes-6.8-2024-02-15-2' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
amd-drm-fixes-6.8-2024-02-15-2: amdgpu: - PSR fixes - Suspend/resume fixes - Link training fix - Aspect ratio fix - DCN 3.5 fixes - VCN 4.x fix - GFX 11 fix - Misc display fixes - Misc small fixes amdkfd: - Cache size reporting fix - SIMD distribution fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240215192452.11805-1-alexander.deucher@amd.com
2 parents 427e337 + a8ac4bc commit 4439570

23 files changed

+114
-38
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -200,6 +200,7 @@ extern uint amdgpu_dc_debug_mask;
200200
extern uint amdgpu_dc_visual_confirm;
201201
extern uint amdgpu_dm_abm_level;
202202
extern int amdgpu_backlight;
203+
extern int amdgpu_damage_clips;
203204
extern struct amdgpu_mgpu_info mgpu_info;
204205
extern int amdgpu_ras_enable;
205206
extern uint amdgpu_ras_mask;
@@ -1549,9 +1550,11 @@ static inline int amdgpu_acpi_smart_shift_update(struct drm_device *dev,
15491550
#if defined(CONFIG_ACPI) && defined(CONFIG_SUSPEND)
15501551
bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
15511552
bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
1553+
void amdgpu_choose_low_power_state(struct amdgpu_device *adev);
15521554
#else
15531555
static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; }
15541556
static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; }
1557+
static inline void amdgpu_choose_low_power_state(struct amdgpu_device *adev) { }
15551558
#endif
15561559

15571560
#if defined(CONFIG_DRM_AMD_DC)

‎drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1519,4 +1519,19 @@ bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev)
15191519
#endif /* CONFIG_AMD_PMC */
15201520
}
15211521

1522+
/**
1523+
* amdgpu_choose_low_power_state
1524+
*
1525+
* @adev: amdgpu_device_pointer
1526+
*
1527+
* Choose the target low power state for the GPU
1528+
*/
1529+
void amdgpu_choose_low_power_state(struct amdgpu_device *adev)
1530+
{
1531+
if (amdgpu_acpi_is_s0ix_active(adev))
1532+
adev->in_s0ix = true;
1533+
else if (amdgpu_acpi_is_s3_active(adev))
1534+
adev->in_s3 = true;
1535+
}
1536+
15221537
#endif /* CONFIG_SUSPEND */

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4514,13 +4514,15 @@ int amdgpu_device_prepare(struct drm_device *dev)
45144514
struct amdgpu_device *adev = drm_to_adev(dev);
45154515
int i, r;
45164516

4517+
amdgpu_choose_low_power_state(adev);
4518+
45174519
if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
45184520
return 0;
45194521

45204522
/* Evict the majority of BOs before starting suspend sequence */
45214523
r = amdgpu_device_evict_resources(adev);
45224524
if (r)
4523-
return r;
4525+
goto unprepare;
45244526

45254527
for (i = 0; i < adev->num_ip_blocks; i++) {
45264528
if (!adev->ip_blocks[i].status.valid)
@@ -4529,10 +4531,15 @@ int amdgpu_device_prepare(struct drm_device *dev)
45294531
continue;
45304532
r = adev->ip_blocks[i].version->funcs->prepare_suspend((void *)adev);
45314533
if (r)
4532-
return r;
4534+
goto unprepare;
45334535
}
45344536

45354537
return 0;
4538+
4539+
unprepare:
4540+
adev->in_s0ix = adev->in_s3 = false;
4541+
4542+
return r;
45364543
}
45374544

45384545
/**
@@ -4569,7 +4576,6 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
45694576
drm_fb_helper_set_suspend_unlocked(adev_to_drm(adev)->fb_helper, true);
45704577

45714578
cancel_delayed_work_sync(&adev->delayed_init_work);
4572-
flush_delayed_work(&adev->gfx.gfx_off_delay_work);
45734579

45744580
amdgpu_ras_suspend(adev);
45754581

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -211,6 +211,7 @@ int amdgpu_seamless = -1; /* auto */
211211
uint amdgpu_debug_mask;
212212
int amdgpu_agp = -1; /* auto */
213213
int amdgpu_wbrf = -1;
214+
int amdgpu_damage_clips = -1; /* auto */
214215

215216
static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work);
216217

@@ -859,6 +860,18 @@ int amdgpu_backlight = -1;
859860
MODULE_PARM_DESC(backlight, "Backlight control (0 = pwm, 1 = aux, -1 auto (default))");
860861
module_param_named(backlight, amdgpu_backlight, bint, 0444);
861862

863+
/**
864+
* DOC: damageclips (int)
865+
* Enable or disable damage clips support. If damage clips support is disabled,
866+
* we will force full frame updates, irrespective of what user space sends to
867+
* us.
868+
*
869+
* Defaults to -1 (where it is enabled unless a PSR-SU display is detected).
870+
*/
871+
MODULE_PARM_DESC(damageclips,
872+
"Damage clips support (0 = disable, 1 = enable, -1 auto (default))");
873+
module_param_named(damageclips, amdgpu_damage_clips, int, 0444);
874+
862875
/**
863876
* DOC: tmz (int)
864877
* Trusted Memory Zone (TMZ) is a method to protect data being written

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -723,8 +723,15 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable)
723723

724724
if (adev->gfx.gfx_off_req_count == 0 &&
725725
!adev->gfx.gfx_off_state) {
726-
schedule_delayed_work(&adev->gfx.gfx_off_delay_work,
726+
/* If going to s2idle, no need to wait */
727+
if (adev->in_s0ix) {
728+
if (!amdgpu_dpm_set_powergating_by_smu(adev,
729+
AMD_IP_BLOCK_TYPE_GFX, true))
730+
adev->gfx.gfx_off_state = true;
731+
} else {
732+
schedule_delayed_work(&adev->gfx.gfx_off_delay_work,
727733
delay);
734+
}
728735
}
729736
} else {
730737
if (adev->gfx.gfx_off_req_count == 0) {

‎drivers/gpu/drm/amd/amdgpu/soc21.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -50,13 +50,13 @@ static const struct amd_ip_funcs soc21_common_ip_funcs;
5050
/* SOC21 */
5151
static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_encode_array_vcn0[] = {
5252
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
53-
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},
53+
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)},
5454
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},
5555
};
5656

5757
static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_encode_array_vcn1[] = {
5858
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
59-
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},
59+
{codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 0)},
6060
};
6161

6262
static const struct amdgpu_video_codecs vcn_4_0_0_video_codecs_encode_vcn0 = {

‎drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -55,8 +55,8 @@ static void update_cu_mask(struct mqd_manager *mm, void *mqd,
5555
m = get_mqd(mqd);
5656

5757
if (has_wa_flag) {
58-
uint32_t wa_mask = minfo->update_flag == UPDATE_FLAG_DBG_WA_ENABLE ?
59-
0xffff : 0xffffffff;
58+
uint32_t wa_mask =
59+
(minfo->update_flag & UPDATE_FLAG_DBG_WA_ENABLE) ? 0xffff : 0xffffffff;
6060

6161
m->compute_static_thread_mgmt_se0 = wa_mask;
6262
m->compute_static_thread_mgmt_se1 = wa_mask;

‎drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -303,6 +303,15 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
303303
update_cu_mask(mm, mqd, minfo, 0);
304304
set_priority(m, q);
305305

306+
if (minfo && KFD_GC_VERSION(mm->dev) >= IP_VERSION(9, 4, 2)) {
307+
if (minfo->update_flag & UPDATE_FLAG_IS_GWS)
308+
m->compute_resource_limits |=
309+
COMPUTE_RESOURCE_LIMITS__FORCE_SIMD_DIST_MASK;
310+
else
311+
m->compute_resource_limits &=
312+
~COMPUTE_RESOURCE_LIMITS__FORCE_SIMD_DIST_MASK;
313+
}
314+
306315
q->is_active = QUEUE_IS_ACTIVE(*q);
307316
}
308317

‎drivers/gpu/drm/amd/amdkfd/kfd_priv.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -532,6 +532,7 @@ struct queue_properties {
532532
enum mqd_update_flag {
533533
UPDATE_FLAG_DBG_WA_ENABLE = 1,
534534
UPDATE_FLAG_DBG_WA_DISABLE = 2,
535+
UPDATE_FLAG_IS_GWS = 4, /* quirk for gfx9 IP */
535536
};
536537

537538
struct mqd_update_info {

‎drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -95,6 +95,7 @@ void kfd_process_dequeue_from_device(struct kfd_process_device *pdd)
9595
int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid,
9696
void *gws)
9797
{
98+
struct mqd_update_info minfo = {0};
9899
struct kfd_node *dev = NULL;
99100
struct process_queue_node *pqn;
100101
struct kfd_process_device *pdd;
@@ -146,9 +147,10 @@ int pqm_set_gws(struct process_queue_manager *pqm, unsigned int qid,
146147
}
147148

148149
pdd->qpd.num_gws = gws ? dev->adev->gds.gws_size : 0;
150+
minfo.update_flag = gws ? UPDATE_FLAG_IS_GWS : 0;
149151

150152
return pqn->q->device->dqm->ops.update_queue(pqn->q->device->dqm,
151-
pqn->q, NULL);
153+
pqn->q, &minfo);
152154
}
153155

154156
void kfd_process_dequeue_from_all_devices(struct kfd_process *p)

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