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superna9999jbrun3t
superna9999
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jbrun3t
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dt-bindings: clk: axg-audio-clkc: expose all clock ids
Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every axg-audio-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-14-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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‎drivers/clk/meson/axg-audio.h

Lines changed: 0 additions & 70 deletions
Original file line numberDiff line numberDiff line change
@@ -64,76 +64,6 @@
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#define AUDIO_SM1_SW_RESET1 0x02C
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#define AUDIO_CLK81_CTRL 0x030
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#define AUDIO_CLK81_EN 0x034
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/*
68-
* CLKID index values
69-
* These indices are entirely contrived and do not map onto the hardware.
70-
*/
71-
72-
#define AUD_CLKID_MST_A_MCLK_SEL 59
73-
#define AUD_CLKID_MST_B_MCLK_SEL 60
74-
#define AUD_CLKID_MST_C_MCLK_SEL 61
75-
#define AUD_CLKID_MST_D_MCLK_SEL 62
76-
#define AUD_CLKID_MST_E_MCLK_SEL 63
77-
#define AUD_CLKID_MST_F_MCLK_SEL 64
78-
#define AUD_CLKID_MST_A_MCLK_DIV 65
79-
#define AUD_CLKID_MST_B_MCLK_DIV 66
80-
#define AUD_CLKID_MST_C_MCLK_DIV 67
81-
#define AUD_CLKID_MST_D_MCLK_DIV 68
82-
#define AUD_CLKID_MST_E_MCLK_DIV 69
83-
#define AUD_CLKID_MST_F_MCLK_DIV 70
84-
#define AUD_CLKID_SPDIFOUT_CLK_SEL 71
85-
#define AUD_CLKID_SPDIFOUT_CLK_DIV 72
86-
#define AUD_CLKID_SPDIFIN_CLK_SEL 73
87-
#define AUD_CLKID_SPDIFIN_CLK_DIV 74
88-
#define AUD_CLKID_PDM_DCLK_SEL 75
89-
#define AUD_CLKID_PDM_DCLK_DIV 76
90-
#define AUD_CLKID_PDM_SYSCLK_SEL 77
91-
#define AUD_CLKID_PDM_SYSCLK_DIV 78
92-
#define AUD_CLKID_MST_A_SCLK_PRE_EN 92
93-
#define AUD_CLKID_MST_B_SCLK_PRE_EN 93
94-
#define AUD_CLKID_MST_C_SCLK_PRE_EN 94
95-
#define AUD_CLKID_MST_D_SCLK_PRE_EN 95
96-
#define AUD_CLKID_MST_E_SCLK_PRE_EN 96
97-
#define AUD_CLKID_MST_F_SCLK_PRE_EN 97
98-
#define AUD_CLKID_MST_A_SCLK_DIV 98
99-
#define AUD_CLKID_MST_B_SCLK_DIV 99
100-
#define AUD_CLKID_MST_C_SCLK_DIV 100
101-
#define AUD_CLKID_MST_D_SCLK_DIV 101
102-
#define AUD_CLKID_MST_E_SCLK_DIV 102
103-
#define AUD_CLKID_MST_F_SCLK_DIV 103
104-
#define AUD_CLKID_MST_A_SCLK_POST_EN 104
105-
#define AUD_CLKID_MST_B_SCLK_POST_EN 105
106-
#define AUD_CLKID_MST_C_SCLK_POST_EN 106
107-
#define AUD_CLKID_MST_D_SCLK_POST_EN 107
108-
#define AUD_CLKID_MST_E_SCLK_POST_EN 108
109-
#define AUD_CLKID_MST_F_SCLK_POST_EN 109
110-
#define AUD_CLKID_MST_A_LRCLK_DIV 110
111-
#define AUD_CLKID_MST_B_LRCLK_DIV 111
112-
#define AUD_CLKID_MST_C_LRCLK_DIV 112
113-
#define AUD_CLKID_MST_D_LRCLK_DIV 113
114-
#define AUD_CLKID_MST_E_LRCLK_DIV 114
115-
#define AUD_CLKID_MST_F_LRCLK_DIV 115
116-
#define AUD_CLKID_TDMIN_A_SCLK_PRE_EN 137
117-
#define AUD_CLKID_TDMIN_B_SCLK_PRE_EN 138
118-
#define AUD_CLKID_TDMIN_C_SCLK_PRE_EN 139
119-
#define AUD_CLKID_TDMIN_LB_SCLK_PRE_EN 140
120-
#define AUD_CLKID_TDMOUT_A_SCLK_PRE_EN 141
121-
#define AUD_CLKID_TDMOUT_B_SCLK_PRE_EN 142
122-
#define AUD_CLKID_TDMOUT_C_SCLK_PRE_EN 143
123-
#define AUD_CLKID_TDMIN_A_SCLK_POST_EN 144
124-
#define AUD_CLKID_TDMIN_B_SCLK_POST_EN 145
125-
#define AUD_CLKID_TDMIN_C_SCLK_POST_EN 146
126-
#define AUD_CLKID_TDMIN_LB_SCLK_POST_EN 147
127-
#define AUD_CLKID_TDMOUT_A_SCLK_POST_EN 148
128-
#define AUD_CLKID_TDMOUT_B_SCLK_POST_EN 149
129-
#define AUD_CLKID_TDMOUT_C_SCLK_POST_EN 150
130-
#define AUD_CLKID_SPDIFOUT_B_CLK_SEL 153
131-
#define AUD_CLKID_SPDIFOUT_B_CLK_DIV 154
132-
#define AUD_CLKID_CLK81_EN 173
133-
#define AUD_CLKID_SYSCLK_A_DIV 174
134-
#define AUD_CLKID_SYSCLK_B_DIV 175
135-
#define AUD_CLKID_SYSCLK_A_EN 176
136-
#define AUD_CLKID_SYSCLK_B_EN 177
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/* include the CLKIDs which are part of the DT bindings */
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#include <dt-bindings/clock/axg-audio-clkc.h>

‎include/dt-bindings/clock/axg-audio-clkc.h

Lines changed: 65 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,26 @@
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#define AUD_CLKID_SPDIFIN_CLK 56
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#define AUD_CLKID_PDM_DCLK 57
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#define AUD_CLKID_PDM_SYSCLK 58
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#define AUD_CLKID_MST_A_MCLK_SEL 59
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#define AUD_CLKID_MST_B_MCLK_SEL 60
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#define AUD_CLKID_MST_C_MCLK_SEL 61
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#define AUD_CLKID_MST_D_MCLK_SEL 62
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#define AUD_CLKID_MST_E_MCLK_SEL 63
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#define AUD_CLKID_MST_F_MCLK_SEL 64
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#define AUD_CLKID_MST_A_MCLK_DIV 65
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#define AUD_CLKID_MST_B_MCLK_DIV 66
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#define AUD_CLKID_MST_C_MCLK_DIV 67
49+
#define AUD_CLKID_MST_D_MCLK_DIV 68
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#define AUD_CLKID_MST_E_MCLK_DIV 69
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#define AUD_CLKID_MST_F_MCLK_DIV 70
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#define AUD_CLKID_SPDIFOUT_CLK_SEL 71
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#define AUD_CLKID_SPDIFOUT_CLK_DIV 72
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#define AUD_CLKID_SPDIFIN_CLK_SEL 73
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#define AUD_CLKID_SPDIFIN_CLK_DIV 74
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#define AUD_CLKID_PDM_DCLK_SEL 75
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#define AUD_CLKID_PDM_DCLK_DIV 76
58+
#define AUD_CLKID_PDM_SYSCLK_SEL 77
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#define AUD_CLKID_PDM_SYSCLK_DIV 78
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#define AUD_CLKID_MST_A_SCLK 79
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#define AUD_CLKID_MST_B_SCLK 80
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#define AUD_CLKID_MST_C_SCLK 81
@@ -49,6 +69,30 @@
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#define AUD_CLKID_MST_D_LRCLK 89
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#define AUD_CLKID_MST_E_LRCLK 90
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#define AUD_CLKID_MST_F_LRCLK 91
72+
#define AUD_CLKID_MST_A_SCLK_PRE_EN 92
73+
#define AUD_CLKID_MST_B_SCLK_PRE_EN 93
74+
#define AUD_CLKID_MST_C_SCLK_PRE_EN 94
75+
#define AUD_CLKID_MST_D_SCLK_PRE_EN 95
76+
#define AUD_CLKID_MST_E_SCLK_PRE_EN 96
77+
#define AUD_CLKID_MST_F_SCLK_PRE_EN 97
78+
#define AUD_CLKID_MST_A_SCLK_DIV 98
79+
#define AUD_CLKID_MST_B_SCLK_DIV 99
80+
#define AUD_CLKID_MST_C_SCLK_DIV 100
81+
#define AUD_CLKID_MST_D_SCLK_DIV 101
82+
#define AUD_CLKID_MST_E_SCLK_DIV 102
83+
#define AUD_CLKID_MST_F_SCLK_DIV 103
84+
#define AUD_CLKID_MST_A_SCLK_POST_EN 104
85+
#define AUD_CLKID_MST_B_SCLK_POST_EN 105
86+
#define AUD_CLKID_MST_C_SCLK_POST_EN 106
87+
#define AUD_CLKID_MST_D_SCLK_POST_EN 107
88+
#define AUD_CLKID_MST_E_SCLK_POST_EN 108
89+
#define AUD_CLKID_MST_F_SCLK_POST_EN 109
90+
#define AUD_CLKID_MST_A_LRCLK_DIV 110
91+
#define AUD_CLKID_MST_B_LRCLK_DIV 111
92+
#define AUD_CLKID_MST_C_LRCLK_DIV 112
93+
#define AUD_CLKID_MST_D_LRCLK_DIV 113
94+
#define AUD_CLKID_MST_E_LRCLK_DIV 114
95+
#define AUD_CLKID_MST_F_LRCLK_DIV 115
5296
#define AUD_CLKID_TDMIN_A_SCLK_SEL 116
5397
#define AUD_CLKID_TDMIN_B_SCLK_SEL 117
5498
#define AUD_CLKID_TDMIN_C_SCLK_SEL 118
@@ -70,8 +114,24 @@
70114
#define AUD_CLKID_TDMOUT_A_LRCLK 134
71115
#define AUD_CLKID_TDMOUT_B_LRCLK 135
72116
#define AUD_CLKID_TDMOUT_C_LRCLK 136
117+
#define AUD_CLKID_TDMIN_A_SCLK_PRE_EN 137
118+
#define AUD_CLKID_TDMIN_B_SCLK_PRE_EN 138
119+
#define AUD_CLKID_TDMIN_C_SCLK_PRE_EN 139
120+
#define AUD_CLKID_TDMIN_LB_SCLK_PRE_EN 140
121+
#define AUD_CLKID_TDMOUT_A_SCLK_PRE_EN 141
122+
#define AUD_CLKID_TDMOUT_B_SCLK_PRE_EN 142
123+
#define AUD_CLKID_TDMOUT_C_SCLK_PRE_EN 143
124+
#define AUD_CLKID_TDMIN_A_SCLK_POST_EN 144
125+
#define AUD_CLKID_TDMIN_B_SCLK_POST_EN 145
126+
#define AUD_CLKID_TDMIN_C_SCLK_POST_EN 146
127+
#define AUD_CLKID_TDMIN_LB_SCLK_POST_EN 147
128+
#define AUD_CLKID_TDMOUT_A_SCLK_POST_EN 148
129+
#define AUD_CLKID_TDMOUT_B_SCLK_POST_EN 149
130+
#define AUD_CLKID_TDMOUT_C_SCLK_POST_EN 150
73131
#define AUD_CLKID_SPDIFOUT_B 151
74132
#define AUD_CLKID_SPDIFOUT_B_CLK 152
133+
#define AUD_CLKID_SPDIFOUT_B_CLK_SEL 153
134+
#define AUD_CLKID_SPDIFOUT_B_CLK_DIV 154
75135
#define AUD_CLKID_TDM_MCLK_PAD0 155
76136
#define AUD_CLKID_TDM_MCLK_PAD1 156
77137
#define AUD_CLKID_TDM_LRCLK_PAD0 157
@@ -90,5 +150,10 @@
90150
#define AUD_CLKID_FRDDR_D 170
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#define AUD_CLKID_TODDR_D 171
92152
#define AUD_CLKID_LOOPBACK_B 172
153+
#define AUD_CLKID_CLK81_EN 173
154+
#define AUD_CLKID_SYSCLK_A_DIV 174
155+
#define AUD_CLKID_SYSCLK_B_DIV 175
156+
#define AUD_CLKID_SYSCLK_A_EN 176
157+
#define AUD_CLKID_SYSCLK_B_EN 177
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#endif /* __AXG_AUDIO_CLKC_BINDINGS_H */

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