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Merge tag 'amd-drm-next-6.9-2024-02-19' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-6.9-2024-02-19: amdgpu: - ATHUB 4.1 support - EEPROM support updates - RAS updates - LSDMA 7.0 support - JPEG DPG support - IH 7.0 support - HDP 7.0 support - VCN 5.0 support - Misc display fixes - Retimer fixes - DCN 3.5 fixes - VCN 4.x fixes - PSR fixes - PSP 14.0 support - VA_RESERVED cleanup - SMU 13.0.6 updates - NBIO 7.11 updates - SDMA 6.1 updates - MMHUB 3.3 updates - Suspend/resume fixes - DMUB updates amdkfd: - Trap handler enhancements - Fix cache size reporting - Relocate the trap handler radeon: - fix typo in print statement Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240219214810.4911-1-alexander.deucher@amd.com
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‎drivers/gpu/drm/amd/amdgpu/Makefile

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -98,7 +98,7 @@ amdgpu-y += \
9898
vega20_reg_init.o nbio_v7_4.o nbio_v2_3.o nv.o arct_reg_init.o mxgpu_nv.o \
9999
nbio_v7_2.o hdp_v4_0.o hdp_v5_0.o aldebaran_reg_init.o aldebaran.o soc21.o \
100100
sienna_cichlid.o smu_v13_0_10.o nbio_v4_3.o hdp_v6_0.o nbio_v7_7.o hdp_v5_2.o lsdma_v6_0.o \
101-
nbio_v7_9.o aqua_vanjaram.o nbio_v7_11.o
101+
nbio_v7_9.o aqua_vanjaram.o nbio_v7_11.o lsdma_v7_0.o hdp_v7_0.o
102102

103103
# add DF block
104104
amdgpu-y += \
@@ -132,7 +132,8 @@ amdgpu-y += \
132132
vega20_ih.o \
133133
navi10_ih.o \
134134
ih_v6_0.o \
135-
ih_v6_1.o
135+
ih_v6_1.o \
136+
ih_v7_0.o
136137

137138
# add PSP block
138139
amdgpu-y += \
@@ -143,7 +144,8 @@ amdgpu-y += \
143144
psp_v11_0_8.o \
144145
psp_v12_0.o \
145146
psp_v13_0.o \
146-
psp_v13_0_4.o
147+
psp_v13_0_4.o \
148+
psp_v14_0.o
147149

148150
# add DCE block
149151
amdgpu-y += \
@@ -208,14 +210,16 @@ amdgpu-y += \
208210
vcn_v4_0.o \
209211
vcn_v4_0_3.o \
210212
vcn_v4_0_5.o \
213+
vcn_v5_0_0.o \
211214
amdgpu_jpeg.o \
212215
jpeg_v1_0.o \
213216
jpeg_v2_0.o \
214217
jpeg_v2_5.o \
215218
jpeg_v3_0.o \
216219
jpeg_v4_0.o \
217220
jpeg_v4_0_3.o \
218-
jpeg_v4_0_5.o
221+
jpeg_v4_0_5.o \
222+
jpeg_v5_0_0.o
219223

220224
# add VPE block
221225
amdgpu-y += \
@@ -233,7 +237,8 @@ amdgpu-y += \
233237
athub_v1_0.o \
234238
athub_v2_0.o \
235239
athub_v2_1.o \
236-
athub_v3_0.o
240+
athub_v3_0.o \
241+
athub_v4_1_0.o
237242

238243
# add SMUIO block
239244
amdgpu-y += \

‎drivers/gpu/drm/amd/amdgpu/amdgpu.h

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -196,8 +196,9 @@ extern int amdgpu_smu_pptable_id;
196196
extern uint amdgpu_dc_feature_mask;
197197
extern uint amdgpu_dc_debug_mask;
198198
extern uint amdgpu_dc_visual_confirm;
199-
extern uint amdgpu_dm_abm_level;
199+
extern int amdgpu_dm_abm_level;
200200
extern int amdgpu_backlight;
201+
extern int amdgpu_damage_clips;
201202
extern struct amdgpu_mgpu_info mgpu_info;
202203
extern int amdgpu_ras_enable;
203204
extern uint amdgpu_ras_mask;
@@ -1095,6 +1096,7 @@ struct amdgpu_device {
10951096
long sdma_timeout;
10961097
long video_timeout;
10971098
long compute_timeout;
1099+
long psp_timeout;
10981100

10991101
uint64_t unique_id;
11001102
uint64_t df_perfmon_config_assign_mask[AMDGPU_MAX_DF_PERFMONS];
@@ -1551,9 +1553,11 @@ static inline int amdgpu_acpi_smart_shift_update(struct drm_device *dev,
15511553
#if defined(CONFIG_ACPI) && defined(CONFIG_SUSPEND)
15521554
bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
15531555
bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
1556+
void amdgpu_choose_low_power_state(struct amdgpu_device *adev);
15541557
#else
15551558
static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; }
15561559
static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; }
1560+
static inline void amdgpu_choose_low_power_state(struct amdgpu_device *adev) { }
15571561
#endif
15581562

15591563
#if defined(CONFIG_DRM_AMD_DC)

‎drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1519,4 +1519,19 @@ bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev)
15191519
#endif /* CONFIG_AMD_PMC */
15201520
}
15211521

1522+
/**
1523+
* amdgpu_choose_low_power_state
1524+
*
1525+
* @adev: amdgpu_device_pointer
1526+
*
1527+
* Choose the target low power state for the GPU
1528+
*/
1529+
void amdgpu_choose_low_power_state(struct amdgpu_device *adev)
1530+
{
1531+
if (amdgpu_acpi_is_s0ix_active(adev))
1532+
adev->in_s0ix = true;
1533+
else if (amdgpu_acpi_is_s3_active(adev))
1534+
adev->in_s3 = true;
1535+
}
1536+
15221537
#endif /* CONFIG_SUSPEND */

‎drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,8 @@
2828

2929
uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)
3030
{
31-
uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;
31+
uint64_t addr = AMDGPU_VA_RESERVED_CSA_START(adev);
3232

33-
addr -= AMDGPU_VA_RESERVED_CSA_SIZE;
3433
addr = amdgpu_gmc_sign_extend(addr);
3534

3635
return addr;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4529,13 +4529,15 @@ int amdgpu_device_prepare(struct drm_device *dev)
45294529
struct amdgpu_device *adev = drm_to_adev(dev);
45304530
int i, r;
45314531

4532+
amdgpu_choose_low_power_state(adev);
4533+
45324534
if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
45334535
return 0;
45344536

45354537
/* Evict the majority of BOs before starting suspend sequence */
45364538
r = amdgpu_device_evict_resources(adev);
45374539
if (r)
4538-
return r;
4540+
goto unprepare;
45394541

45404542
for (i = 0; i < adev->num_ip_blocks; i++) {
45414543
if (!adev->ip_blocks[i].status.valid)
@@ -4544,10 +4546,15 @@ int amdgpu_device_prepare(struct drm_device *dev)
45444546
continue;
45454547
r = adev->ip_blocks[i].version->funcs->prepare_suspend((void *)adev);
45464548
if (r)
4547-
return r;
4549+
goto unprepare;
45484550
}
45494551

45504552
return 0;
4553+
4554+
unprepare:
4555+
adev->in_s0ix = adev->in_s3 = false;
4556+
4557+
return r;
45514558
}
45524559

45534560
/**
@@ -4584,7 +4591,6 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
45844591
drm_fb_helper_set_suspend_unlocked(adev_to_drm(adev)->fb_helper, true);
45854592

45864593
cancel_delayed_work_sync(&adev->delayed_init_work);
4587-
flush_delayed_work(&adev->gfx.gfx_off_delay_work);
45884594

45894595
amdgpu_ras_suspend(adev);
45904596

‎drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -64,17 +64,20 @@
6464
#include "hdp_v5_0.h"
6565
#include "hdp_v5_2.h"
6666
#include "hdp_v6_0.h"
67+
#include "hdp_v7_0.h"
6768
#include "nv.h"
6869
#include "soc21.h"
6970
#include "navi10_ih.h"
7071
#include "ih_v6_0.h"
7172
#include "ih_v6_1.h"
73+
#include "ih_v7_0.h"
7274
#include "gfx_v10_0.h"
7375
#include "gfx_v11_0.h"
7476
#include "sdma_v5_0.h"
7577
#include "sdma_v5_2.h"
7678
#include "sdma_v6_0.h"
7779
#include "lsdma_v6_0.h"
80+
#include "lsdma_v7_0.h"
7881
#include "vcn_v2_0.h"
7982
#include "jpeg_v2_0.h"
8083
#include "vcn_v3_0.h"
@@ -93,6 +96,8 @@
9396
#include "smuio_v13_0.h"
9497
#include "smuio_v13_0_3.h"
9598
#include "smuio_v13_0_6.h"
99+
#include "vcn_v5_0_0.h"
100+
#include "jpeg_v5_0_0.h"
96101

97102
#include "amdgpu_vpe.h"
98103

@@ -1767,6 +1772,9 @@ static int amdgpu_discovery_set_ih_ip_blocks(struct amdgpu_device *adev)
17671772
case IP_VERSION(6, 1, 0):
17681773
amdgpu_device_ip_block_add(adev, &ih_v6_1_ip_block);
17691774
break;
1775+
case IP_VERSION(7, 0, 0):
1776+
amdgpu_device_ip_block_add(adev, &ih_v7_0_ip_block);
1777+
break;
17701778
default:
17711779
dev_err(adev->dev,
17721780
"Failed to add ih ip block(OSSSYS_HWIP:0x%x)\n",
@@ -1816,11 +1824,16 @@ static int amdgpu_discovery_set_psp_ip_blocks(struct amdgpu_device *adev)
18161824
case IP_VERSION(13, 0, 10):
18171825
case IP_VERSION(13, 0, 11):
18181826
case IP_VERSION(14, 0, 0):
1827+
case IP_VERSION(14, 0, 1):
18191828
amdgpu_device_ip_block_add(adev, &psp_v13_0_ip_block);
18201829
break;
18211830
case IP_VERSION(13, 0, 4):
18221831
amdgpu_device_ip_block_add(adev, &psp_v13_0_4_ip_block);
18231832
break;
1833+
case IP_VERSION(14, 0, 2):
1834+
case IP_VERSION(14, 0, 3):
1835+
amdgpu_device_ip_block_add(adev, &psp_v14_0_ip_block);
1836+
break;
18241837
default:
18251838
dev_err(adev->dev,
18261839
"Failed to add psp ip block(MP0_HWIP:0x%x)\n",
@@ -2037,6 +2050,7 @@ static int amdgpu_discovery_set_sdma_ip_blocks(struct amdgpu_device *adev)
20372050
case IP_VERSION(6, 0, 2):
20382051
case IP_VERSION(6, 0, 3):
20392052
case IP_VERSION(6, 1, 0):
2053+
case IP_VERSION(6, 1, 1):
20402054
amdgpu_device_ip_block_add(adev, &sdma_v6_0_ip_block);
20412055
break;
20422056
default:
@@ -2126,6 +2140,10 @@ static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev)
21262140
amdgpu_device_ip_block_add(adev, &vcn_v4_0_5_ip_block);
21272141
amdgpu_device_ip_block_add(adev, &jpeg_v4_0_5_ip_block);
21282142
break;
2143+
case IP_VERSION(5, 0, 0):
2144+
amdgpu_device_ip_block_add(adev, &vcn_v5_0_0_ip_block);
2145+
amdgpu_device_ip_block_add(adev, &jpeg_v5_0_0_ip_block);
2146+
break;
21292147
default:
21302148
dev_err(adev->dev,
21312149
"Failed to add vcn/jpeg ip block(UVD_HWIP:0x%x)\n",
@@ -2497,6 +2515,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
24972515
adev->nbio.hdp_flush_reg = &nbio_v7_9_hdp_flush_reg;
24982516
break;
24992517
case IP_VERSION(7, 11, 0):
2518+
case IP_VERSION(7, 11, 1):
25002519
adev->nbio.funcs = &nbio_v7_11_funcs;
25012520
adev->nbio.hdp_flush_reg = &nbio_v7_11_hdp_flush_reg;
25022521
break;
@@ -2564,6 +2583,9 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
25642583
case IP_VERSION(6, 1, 0):
25652584
adev->hdp.funcs = &hdp_v6_0_funcs;
25662585
break;
2586+
case IP_VERSION(7, 0, 0):
2587+
adev->hdp.funcs = &hdp_v7_0_funcs;
2588+
break;
25672589
default:
25682590
break;
25692591
}
@@ -2628,6 +2650,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
26282650
case IP_VERSION(13, 0, 6):
26292651
case IP_VERSION(13, 0, 8):
26302652
case IP_VERSION(14, 0, 0):
2653+
case IP_VERSION(14, 0, 1):
26312654
adev->smuio.funcs = &smuio_v13_0_6_funcs;
26322655
break;
26332656
default:
@@ -2641,6 +2664,10 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
26412664
case IP_VERSION(6, 0, 3):
26422665
adev->lsdma.funcs = &lsdma_v6_0_funcs;
26432666
break;
2667+
case IP_VERSION(7, 0, 0):
2668+
case IP_VERSION(7, 0, 1):
2669+
adev->lsdma.funcs = &lsdma_v7_0_funcs;
2670+
break;
26442671
default:
26452672
break;
26462673
}

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

Lines changed: 19 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -211,6 +211,7 @@ int amdgpu_seamless = -1; /* auto */
211211
uint amdgpu_debug_mask;
212212
int amdgpu_agp = -1; /* auto */
213213
int amdgpu_wbrf = -1;
214+
int amdgpu_damage_clips = -1; /* auto */
214215

215216
static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work);
216217

@@ -848,17 +849,30 @@ module_param_named(visualconfirm, amdgpu_dc_visual_confirm, uint, 0444);
848849
* the ABM algorithm, with 1 being the least reduction and 4 being the most
849850
* reduction.
850851
*
851-
* Defaults to 0, or disabled. Userspace can still override this level later
852-
* after boot.
852+
* Defaults to -1, or disabled. Userspace can only override this level after
853+
* boot if it's set to auto.
853854
*/
854-
uint amdgpu_dm_abm_level;
855-
MODULE_PARM_DESC(abmlevel, "ABM level (0 = off (default), 1-4 = backlight reduction level) ");
856-
module_param_named(abmlevel, amdgpu_dm_abm_level, uint, 0444);
855+
int amdgpu_dm_abm_level = -1;
856+
MODULE_PARM_DESC(abmlevel,
857+
"ABM level (0 = off, 1-4 = backlight reduction level, -1 auto (default))");
858+
module_param_named(abmlevel, amdgpu_dm_abm_level, int, 0444);
857859

858860
int amdgpu_backlight = -1;
859861
MODULE_PARM_DESC(backlight, "Backlight control (0 = pwm, 1 = aux, -1 auto (default))");
860862
module_param_named(backlight, amdgpu_backlight, bint, 0444);
861863

864+
/**
865+
* DOC: damageclips (int)
866+
* Enable or disable damage clips support. If damage clips support is disabled,
867+
* we will force full frame updates, irrespective of what user space sends to
868+
* us.
869+
*
870+
* Defaults to -1 (where it is enabled unless a PSR-SU display is detected).
871+
*/
872+
MODULE_PARM_DESC(damageclips,
873+
"Damage clips support (0 = disable, 1 = enable, -1 auto (default))");
874+
module_param_named(damageclips, amdgpu_damage_clips, int, 0444);
875+
862876
/**
863877
* DOC: tmz (int)
864878
* Trusted Memory Zone (TMZ) is a method to protect data being written

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -724,8 +724,15 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable)
724724

725725
if (adev->gfx.gfx_off_req_count == 0 &&
726726
!adev->gfx.gfx_off_state) {
727-
schedule_delayed_work(&adev->gfx.gfx_off_delay_work,
727+
/* If going to s2idle, no need to wait */
728+
if (adev->in_s0ix) {
729+
if (!amdgpu_dpm_set_powergating_by_smu(adev,
730+
AMD_IP_BLOCK_TYPE_GFX, true))
731+
adev->gfx.gfx_off_state = true;
732+
} else {
733+
schedule_delayed_work(&adev->gfx.gfx_off_delay_work,
728734
delay);
735+
}
729736
}
730737
} else {
731738
if (adev->gfx.gfx_off_req_count == 0) {

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