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Merge tag 'drm-fixes-2025-02-22' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "Weekly drm fixes pull request, lots of small things all over, msm has a bunch of things but all very small, xe, i915, a fix for the cgroup dmem controller. core: - remove MAINTAINERS entry cgroup/dmem: - use correct function for pool descendants panel: - fix signal polarity issue jd9365da-h3 nouveau: - folio handling fix - config fix amdxdna: - fix missing header xe: - Fix error handling in xe_irq_install - Fix devcoredump format i915: - Use spin_lock_irqsave() in interruptible context on guc submission - Fixes on DDI and TRANS programming - Make sure all planes in use by the joiner have their crtc included - Fix 128b/132b modeset issues msm: - More catalog fixes: - to skip watchdog programming through top block if its not present - fix the setting of WB mask to ensure the WB input control is programmed correctly through ping-pong - drop lm_pair for sm6150 as that chipset does not have any 3dmerge block - Fix the mode validation logic for DP/eDP to account for widebus (2ppc) to allow high clock resolutions - Fix to disable dither during encoder disable as otherwise this was causing kms_writeback failure due to resource sharing between WB and DSI paths as DSI uses dither but WB does not - Fixes for virtual planes, namely to drop extraneous return and fix uninitialized variables - Fix to avoid spill-over of DSC encoder block bits when programming the bits-per-component - Fixes in the DSI PHY to protect against concurrent access of PHY_CMN_CLK_CFG regs between clock and display drivers - Core/GPU: - Fix non-blocking fence wait incorrectly rounding up to 1 jiffy timeout - Only print GMU fw version once, instead of each time the GPU resumes" * tag 'drm-fixes-2025-02-22' of https://gitlab.freedesktop.org/drm/kernel: (28 commits) drm/i915/dp: Fix disabling the transcoder function in 128b/132b mode drm/i915/dp: Fix error handling during 128b/132b link training accel/amdxdna: Add missing include linux/slab.h MAINTAINERS: Remove myself drm/nouveau/pmu: Fix gp10b firmware guard cgroup/dmem: Don't open-code css_for_each_descendant_pre drm/xe/guc: Fix size_t print format drm/xe: Make GUC binaries dump consistent with other binaries in devcoredump drm/i915: Make sure all planes in use by the joiner have their crtc included drm/i915/ddi: Fix HDMI port width programming in DDI_BUF_CTL drm/i915/dsi: Use TRANS_DDI_FUNC_CTL's own port width macro drm/xe: Fix error handling in xe_irq_install() drm/i915/gt: Use spin_lock_irqsave() in interruptible context drm/msm/dsi/phy: Do not overwite PHY_CMN_CLK_CFG1 when choosing bitclk source drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG1 against clock driver drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG0 updated from driver side drm/msm/dpu: Drop extraneous return in dpu_crtc_reassign_planes() drm/msm/dpu: Don't leak bits_per_component into random DSC_ENC fields drm/msm/dpu: Disable dither in phys encoder cleanup drm/msm/dpu: Fix uninitialized variable ...
2 parents 8a61cb6 + 9a1cd7d commit 3ef7ace

30 files changed

+146
-124
lines changed

‎MAINTAINERS

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7425,7 +7425,6 @@ F: Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
74257425
F: drivers/gpu/drm/panel/panel-novatek-nt36672a.c
74267426

74277427
DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS
7428-
M: Karol Herbst <kherbst@redhat.com>
74297428
M: Lyude Paul <lyude@redhat.com>
74307429
M: Danilo Krummrich <dakr@kernel.org>
74317430
L: dri-devel@lists.freedesktop.org
@@ -24069,7 +24068,6 @@ F: tools/testing/selftests/ftrace/
2406924068
TRACING MMIO ACCESSES (MMIOTRACE)
2407024069
M: Steven Rostedt <rostedt@goodmis.org>
2407124070
M: Masami Hiramatsu <mhiramat@kernel.org>
24072-
R: Karol Herbst <karolherbst@gmail.com>
2407324071
R: Pekka Paalanen <ppaalanen@gmail.com>
2407424072
L: linux-kernel@vger.kernel.org
2407524073
L: nouveau@lists.freedesktop.org

‎drivers/accel/amdxdna/amdxdna_mailbox.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
#include <linux/bitfield.h>
99
#include <linux/interrupt.h>
1010
#include <linux/iopoll.h>
11+
#include <linux/slab.h>
1112
#include <linux/xarray.h>
1213

1314
#define CREATE_TRACE_POINTS

‎drivers/gpu/drm/i915/display/icl_dsi.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -809,8 +809,8 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
809809
/* select data lane width */
810810
tmp = intel_de_read(display,
811811
TRANS_DDI_FUNC_CTL(display, dsi_trans));
812-
tmp &= ~DDI_PORT_WIDTH_MASK;
813-
tmp |= DDI_PORT_WIDTH(intel_dsi->lane_count);
812+
tmp &= ~TRANS_DDI_PORT_WIDTH_MASK;
813+
tmp |= TRANS_DDI_PORT_WIDTH(intel_dsi->lane_count);
814814

815815
/* select input pipe */
816816
tmp &= ~TRANS_DDI_EDP_INPUT_MASK;

‎drivers/gpu/drm/i915/display/intel_ddi.c

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -658,7 +658,6 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
658658
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
659659
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
660660
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
661-
bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
662661
u32 ctl;
663662

664663
if (DISPLAY_VER(dev_priv) >= 11)
@@ -678,8 +677,7 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
678677
TRANS_DDI_PORT_SYNC_MASTER_SELECT_MASK);
679678

680679
if (DISPLAY_VER(dev_priv) >= 12) {
681-
if (!intel_dp_mst_is_master_trans(crtc_state) ||
682-
(!is_mst && intel_dp_is_uhbr(crtc_state))) {
680+
if (!intel_dp_mst_is_master_trans(crtc_state)) {
683681
ctl &= ~(TGL_TRANS_DDI_PORT_MASK |
684682
TRANS_DDI_MODE_SELECT_MASK);
685683
}
@@ -3134,7 +3132,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
31343132
intel_dp_set_power(intel_dp, DP_SET_POWER_D3);
31353133

31363134
if (DISPLAY_VER(dev_priv) >= 12) {
3137-
if (is_mst) {
3135+
if (is_mst || intel_dp_is_uhbr(old_crtc_state)) {
31383136
enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
31393137

31403138
intel_de_rmw(dev_priv,
@@ -3487,7 +3485,7 @@ static void intel_ddi_enable_hdmi(struct intel_atomic_state *state,
34873485
intel_de_rmw(dev_priv, XELPDP_PORT_BUF_CTL1(dev_priv, port),
34883486
XELPDP_PORT_WIDTH_MASK | XELPDP_PORT_REVERSAL, port_buf);
34893487

3490-
buf_ctl |= DDI_PORT_WIDTH(lane_count);
3488+
buf_ctl |= DDI_PORT_WIDTH(crtc_state->lane_count);
34913489

34923490
if (DISPLAY_VER(dev_priv) >= 20)
34933491
buf_ctl |= XE2LPD_DDI_BUF_D2D_LINK_ENABLE;

‎drivers/gpu/drm/i915/display/intel_display.c

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6628,12 +6628,30 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in
66286628
static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state)
66296629
{
66306630
struct drm_i915_private *i915 = to_i915(state->base.dev);
6631+
const struct intel_plane_state *plane_state;
66316632
struct intel_crtc_state *crtc_state;
6633+
struct intel_plane *plane;
66326634
struct intel_crtc *crtc;
66336635
u8 affected_pipes = 0;
66346636
u8 modeset_pipes = 0;
66356637
int i;
66366638

6639+
/*
6640+
* Any plane which is in use by the joiner needs its crtc.
6641+
* Pull those in first as this will not have happened yet
6642+
* if the plane remains disabled according to uapi.
6643+
*/
6644+
for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
6645+
crtc = to_intel_crtc(plane_state->hw.crtc);
6646+
if (!crtc)
6647+
continue;
6648+
6649+
crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
6650+
if (IS_ERR(crtc_state))
6651+
return PTR_ERR(crtc_state);
6652+
}
6653+
6654+
/* Now pull in all joined crtcs */
66376655
for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
66386656
affected_pipes |= crtc_state->joiner_pipes;
66396657
if (intel_crtc_needs_modeset(crtc_state))

‎drivers/gpu/drm/i915/display/intel_dp_link_training.c

Lines changed: 14 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1563,7 +1563,7 @@ intel_dp_128b132b_link_train(struct intel_dp *intel_dp,
15631563

15641564
if (wait_for(intel_dp_128b132b_intra_hop(intel_dp, crtc_state) == 0, 500)) {
15651565
lt_err(intel_dp, DP_PHY_DPRX, "128b/132b intra-hop not clear\n");
1566-
return false;
1566+
goto out;
15671567
}
15681568

15691569
if (intel_dp_128b132b_lane_eq(intel_dp, crtc_state) &&
@@ -1575,6 +1575,19 @@ intel_dp_128b132b_link_train(struct intel_dp *intel_dp,
15751575
passed ? "passed" : "failed",
15761576
crtc_state->port_clock, crtc_state->lane_count);
15771577

1578+
out:
1579+
/*
1580+
* Ensure that the training pattern does get set to TPS2 even in case
1581+
* of a failure, as is the case at the end of a passing link training
1582+
* and what is expected by the transcoder. Leaving TPS1 set (and
1583+
* disabling the link train mode in DP_TP_CTL later from TPS1 directly)
1584+
* would result in a stuck transcoder HW state and flip-done timeouts
1585+
* later in the modeset sequence.
1586+
*/
1587+
if (!passed)
1588+
intel_dp_program_link_training_pattern(intel_dp, crtc_state,
1589+
DP_PHY_DPRX, DP_TRAINING_PATTERN_2);
1590+
15781591
return passed;
15791592
}
15801593

‎drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3449,10 +3449,10 @@ static inline int guc_lrc_desc_unpin(struct intel_context *ce)
34493449
*/
34503450
ret = deregister_context(ce, ce->guc_id.id);
34513451
if (ret) {
3452-
spin_lock(&ce->guc_state.lock);
3452+
spin_lock_irqsave(&ce->guc_state.lock, flags);
34533453
set_context_registered(ce);
34543454
clr_context_destroyed(ce);
3455-
spin_unlock(&ce->guc_state.lock);
3455+
spin_unlock_irqrestore(&ce->guc_state.lock, flags);
34563456
/*
34573457
* As gt-pm is awake at function entry, intel_wakeref_put_async merely decrements
34583458
* the wakeref immediately but per function spec usage call this after unlock.

‎drivers/gpu/drm/i915/i915_reg.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3633,7 +3633,7 @@ enum skl_power_gate {
36333633
#define DDI_BUF_IS_IDLE (1 << 7)
36343634
#define DDI_BUF_CTL_TC_PHY_OWNERSHIP REG_BIT(6)
36353635
#define DDI_A_4_LANES (1 << 4)
3636-
#define DDI_PORT_WIDTH(width) (((width) - 1) << 1)
3636+
#define DDI_PORT_WIDTH(width) (((width) == 3 ? 4 : ((width) - 1)) << 1)
36373637
#define DDI_PORT_WIDTH_MASK (7 << 1)
36383638
#define DDI_PORT_WIDTH_SHIFT 1
36393639
#define DDI_INIT_DISPLAY_DETECTED (1 << 0)

‎drivers/gpu/drm/msm/adreno/a6xx_gmu.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -813,10 +813,10 @@ static int a6xx_gmu_fw_load(struct a6xx_gmu *gmu)
813813
}
814814

815815
ver = gmu_read(gmu, REG_A6XX_GMU_CORE_FW_VERSION);
816-
DRM_INFO("Loaded GMU firmware v%u.%u.%u\n",
817-
FIELD_GET(A6XX_GMU_CORE_FW_VERSION_MAJOR__MASK, ver),
818-
FIELD_GET(A6XX_GMU_CORE_FW_VERSION_MINOR__MASK, ver),
819-
FIELD_GET(A6XX_GMU_CORE_FW_VERSION_STEP__MASK, ver));
816+
DRM_INFO_ONCE("Loaded GMU firmware v%u.%u.%u\n",
817+
FIELD_GET(A6XX_GMU_CORE_FW_VERSION_MAJOR__MASK, ver),
818+
FIELD_GET(A6XX_GMU_CORE_FW_VERSION_MINOR__MASK, ver),
819+
FIELD_GET(A6XX_GMU_CORE_FW_VERSION_STEP__MASK, ver));
820820

821821
return 0;
822822
}

‎drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -297,7 +297,7 @@ static const struct dpu_wb_cfg sm8150_wb[] = {
297297
{
298298
.name = "wb_2", .id = WB_2,
299299
.base = 0x65000, .len = 0x2c8,
300-
.features = WB_SDM845_MASK,
300+
.features = WB_SM8250_MASK,
301301
.format_list = wb2_formats_rgb,
302302
.num_formats = ARRAY_SIZE(wb2_formats_rgb),
303303
.clk_ctrl = DPU_CLK_CTRL_WB2,

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