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tq-gerberpdlezcano
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thermal/drivers/imx8mm: Enable ADC when enabling monitor
The i.MX 8MP has a ADC_PD bit in the TMU_TER register that controls the operating mode of the ADC: * 0 means normal operating mode * 1 means power down mode When enabling/disabling the TMU, the ADC operating mode must be set accordingly. i.MX 8M Mini & Nano are lacking this bit. Signed-off-by: Paul Gerber <Paul.Gerber@tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Fixes: 2b8f1f0 ("thermal: imx8mm: Add i.MX8MP support") Link: https://lore.kernel.org/r/20211122114225.196280-1-alexander.stein@ew.tq-group.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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drivers/thermal/imx8mm_thermal.c

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@@ -21,6 +21,7 @@
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#define TPS 0x4
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#define TRITSR 0x20 /* TMU immediate temp */
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#define TER_ADC_PD BIT(30)
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#define TER_EN BIT(31)
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#define TRITSR_TEMP0_VAL_MASK 0xff
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#define TRITSR_TEMP1_VAL_MASK 0xff0000
@@ -113,6 +114,8 @@ static void imx8mm_tmu_enable(struct imx8mm_tmu *tmu, bool enable)
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val = readl_relaxed(tmu->base + TER);
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val = enable ? (val | TER_EN) : (val & ~TER_EN);
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if (tmu->socdata->version == TMU_VER2)
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val = enable ? (val & ~TER_ADC_PD) : (val | TER_ADC_PD);
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writel_relaxed(val, tmu->base + TER);
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}
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