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drm/msm/a6xx: Fix misleading comment
The range is actually len+1. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/545099/
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drivers/gpu/drm/msm/adreno/a6xx_gpu.h

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@@ -39,8 +39,8 @@ struct a6xx_gpu {
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/*
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* Given a register and a count, return a value to program into
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* REG_CP_PROTECT_REG(n) - this will block both reads and writes for _len
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* registers starting at _reg.
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* REG_CP_PROTECT_REG(n) - this will block both reads and writes for
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* _len + 1 registers starting at _reg.
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*/
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#define A6XX_PROTECT_NORDWR(_reg, _len) \
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((1 << 31) | \

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