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Merge back earlier power capping changes for v5.17
2 parents b8470e9 + 86ffed3 commit 36fd360

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3 files changed

+66
-3
lines changed

3 files changed

+66
-3
lines changed

drivers/powercap/idle_inject.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@
1212
*
1313
* All of the kthreads used for idle injection are created at init time.
1414
*
15-
* Next, the users of the the idle injection framework provide a cpumask via
15+
* Next, the users of the idle injection framework provide a cpumask via
1616
* its register function. The kthreads will be synchronized with respect to
1717
* this cpumask.
1818
*

drivers/powercap/intel_rapl_common.c

Lines changed: 59 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -61,6 +61,20 @@
6161
#define PERF_STATUS_THROTTLE_TIME_MASK 0xffffffff
6262
#define PP_POLICY_MASK 0x1F
6363

64+
/*
65+
* SPR has different layout for Psys Domain PowerLimit registers.
66+
* There are 17 bits of PL1 and PL2 instead of 15 bits.
67+
* The Enable bits and TimeWindow bits are also shifted as a result.
68+
*/
69+
#define PSYS_POWER_LIMIT1_MASK 0x1FFFF
70+
#define PSYS_POWER_LIMIT1_ENABLE BIT(17)
71+
72+
#define PSYS_POWER_LIMIT2_MASK (0x1FFFFULL<<32)
73+
#define PSYS_POWER_LIMIT2_ENABLE BIT_ULL(49)
74+
75+
#define PSYS_TIME_WINDOW1_MASK (0x7FULL<<19)
76+
#define PSYS_TIME_WINDOW2_MASK (0x7FULL<<51)
77+
6478
/* Non HW constants */
6579
#define RAPL_PRIMITIVE_DERIVED BIT(1) /* not from raw data */
6680
#define RAPL_PRIMITIVE_DUMMY BIT(2)
@@ -97,6 +111,7 @@ struct rapl_defaults {
97111
bool to_raw);
98112
unsigned int dram_domain_energy_unit;
99113
unsigned int psys_domain_energy_unit;
114+
bool spr_psys_bits;
100115
};
101116
static struct rapl_defaults *rapl_defaults;
102117

@@ -669,12 +684,51 @@ static struct rapl_primitive_info rpi[] = {
669684
RAPL_DOMAIN_REG_PERF, TIME_UNIT, 0),
670685
PRIMITIVE_INFO_INIT(PRIORITY_LEVEL, PP_POLICY_MASK, 0,
671686
RAPL_DOMAIN_REG_POLICY, ARBITRARY_UNIT, 0),
687+
PRIMITIVE_INFO_INIT(PSYS_POWER_LIMIT1, PSYS_POWER_LIMIT1_MASK, 0,
688+
RAPL_DOMAIN_REG_LIMIT, POWER_UNIT, 0),
689+
PRIMITIVE_INFO_INIT(PSYS_POWER_LIMIT2, PSYS_POWER_LIMIT2_MASK, 32,
690+
RAPL_DOMAIN_REG_LIMIT, POWER_UNIT, 0),
691+
PRIMITIVE_INFO_INIT(PSYS_PL1_ENABLE, PSYS_POWER_LIMIT1_ENABLE, 17,
692+
RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
693+
PRIMITIVE_INFO_INIT(PSYS_PL2_ENABLE, PSYS_POWER_LIMIT2_ENABLE, 49,
694+
RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0),
695+
PRIMITIVE_INFO_INIT(PSYS_TIME_WINDOW1, PSYS_TIME_WINDOW1_MASK, 19,
696+
RAPL_DOMAIN_REG_LIMIT, TIME_UNIT, 0),
697+
PRIMITIVE_INFO_INIT(PSYS_TIME_WINDOW2, PSYS_TIME_WINDOW2_MASK, 51,
698+
RAPL_DOMAIN_REG_LIMIT, TIME_UNIT, 0),
672699
/* non-hardware */
673700
PRIMITIVE_INFO_INIT(AVERAGE_POWER, 0, 0, 0, POWER_UNIT,
674701
RAPL_PRIMITIVE_DERIVED),
675702
{NULL, 0, 0, 0},
676703
};
677704

705+
static enum rapl_primitives
706+
prim_fixups(struct rapl_domain *rd, enum rapl_primitives prim)
707+
{
708+
if (!rapl_defaults->spr_psys_bits)
709+
return prim;
710+
711+
if (rd->id != RAPL_DOMAIN_PLATFORM)
712+
return prim;
713+
714+
switch (prim) {
715+
case POWER_LIMIT1:
716+
return PSYS_POWER_LIMIT1;
717+
case POWER_LIMIT2:
718+
return PSYS_POWER_LIMIT2;
719+
case PL1_ENABLE:
720+
return PSYS_PL1_ENABLE;
721+
case PL2_ENABLE:
722+
return PSYS_PL2_ENABLE;
723+
case TIME_WINDOW1:
724+
return PSYS_TIME_WINDOW1;
725+
case TIME_WINDOW2:
726+
return PSYS_TIME_WINDOW2;
727+
default:
728+
return prim;
729+
}
730+
}
731+
678732
/* Read primitive data based on its related struct rapl_primitive_info.
679733
* if xlate flag is set, return translated data based on data units, i.e.
680734
* time, energy, and power.
@@ -692,7 +746,8 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
692746
enum rapl_primitives prim, bool xlate, u64 *data)
693747
{
694748
u64 value;
695-
struct rapl_primitive_info *rp = &rpi[prim];
749+
enum rapl_primitives prim_fixed = prim_fixups(rd, prim);
750+
struct rapl_primitive_info *rp = &rpi[prim_fixed];
696751
struct reg_action ra;
697752
int cpu;
698753

@@ -738,7 +793,8 @@ static int rapl_write_data_raw(struct rapl_domain *rd,
738793
enum rapl_primitives prim,
739794
unsigned long long value)
740795
{
741-
struct rapl_primitive_info *rp = &rpi[prim];
796+
enum rapl_primitives prim_fixed = prim_fixups(rd, prim);
797+
struct rapl_primitive_info *rp = &rpi[prim_fixed];
742798
int cpu;
743799
u64 bits;
744800
struct reg_action ra;
@@ -981,6 +1037,7 @@ static const struct rapl_defaults rapl_defaults_spr_server = {
9811037
.compute_time_window = rapl_compute_time_window_core,
9821038
.dram_domain_energy_unit = 15300,
9831039
.psys_domain_energy_unit = 1000000000,
1040+
.spr_psys_bits = true,
9841041
};
9851042

9861043
static const struct rapl_defaults rapl_defaults_byt = {

include/linux/intel_rapl.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,12 @@ enum rapl_primitives {
5858
THROTTLED_TIME,
5959
PRIORITY_LEVEL,
6060

61+
PSYS_POWER_LIMIT1,
62+
PSYS_POWER_LIMIT2,
63+
PSYS_PL1_ENABLE,
64+
PSYS_PL2_ENABLE,
65+
PSYS_TIME_WINDOW1,
66+
PSYS_TIME_WINDOW2,
6167
/* below are not raw primitive data */
6268
AVERAGE_POWER,
6369
NR_RAPL_PRIMITIVES,

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