Skip to content

Commit 32a43b6

Browse files
aknautiyaljnikula
authored andcommitted
drm/i915/watermark: Check bounds for scaler_users for dsc prefill latency
Currently, during the computation of global watermarks, the latency for each scaler user is calculated to compute the DSC prefill latency. At this point, the number of scaler users can exceed the number of supported scalers, which is checked later in intel_atomic_setup_scalers(). This can cause issues when the number of scaler users exceeds the number of supported scalers. While checking for DSC prefill, ensure that the number of scaler users does not exceed the number of supported scalers. Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/4341 Fixes: a9b14af ("drm/i915/dsc: Check if vblank is sufficient for dsc prefill") Cc: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250227034106.1638203-1-ankit.k.nautiyal@intel.com (cherry picked from commit 5d6c69b) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
1 parent 5da39dc commit 32a43b6

File tree

1 file changed

+4
-1
lines changed

1 file changed

+4
-1
lines changed

drivers/gpu/drm/i915/display/skl_watermark.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2314,6 +2314,7 @@ cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state)
23142314
static int
23152315
dsc_prefill_latency(const struct intel_crtc_state *crtc_state)
23162316
{
2317+
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
23172318
const struct intel_crtc_scaler_state *scaler_state =
23182319
&crtc_state->scaler_state;
23192320
int linetime = DIV_ROUND_UP(1000 * crtc_state->hw.adjusted_mode.htotal,
@@ -2323,7 +2324,9 @@ dsc_prefill_latency(const struct intel_crtc_state *crtc_state)
23232324
crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1;
23242325
u32 dsc_prefill_latency = 0;
23252326

2326-
if (!crtc_state->dsc.compression_enable || !num_scaler_users)
2327+
if (!crtc_state->dsc.compression_enable ||
2328+
!num_scaler_users ||
2329+
num_scaler_users > crtc->num_scalers)
23272330
return dsc_prefill_latency;
23282331

23292332
dsc_prefill_latency = DIV_ROUND_UP(15 * linetime * chroma_downscaling_factor, 10);

0 commit comments

Comments
 (0)