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guoren83Marc Zyngier
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dt-bindings: update riscv plic compatible string
Add the compatible string "thead,c900-plic" to the riscv plic bindings to support allwinner d1 SOC which contains c906 core. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Cc: Anup Patel <anup@brainfault.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Rob Herring <robh@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Samuel Holland <samuel@sholland.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220130135634.1213301-2-guoren@kernel.org
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Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml

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@@ -35,19 +35,28 @@ description:
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contains a specific memory layout, which is documented in chapter 8 of the
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SiFive U5 Coreplex Series Manual <https://static.dev.sifive.com/U54-MC-RVCoreIP.pdf>.
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The thead,c900-plic is different from sifive,plic-1.0.0 in opensbi, the
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T-HEAD PLIC implementation requires setting a delegation bit to allow access
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from S-mode. So add thead,c900-plic to distinguish them.
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maintainers:
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- Sagar Kadam <sagar.kadam@sifive.com>
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- Paul Walmsley <paul.walmsley@sifive.com>
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- Palmer Dabbelt <palmer@dabbelt.com>
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properties:
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compatible:
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items:
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- enum:
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- sifive,fu540-c000-plic
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- starfive,jh7100-plic
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- canaan,k210-plic
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- const: sifive,plic-1.0.0
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oneOf:
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- items:
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- enum:
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- sifive,fu540-c000-plic
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- starfive,jh7100-plic
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- canaan,k210-plic
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- const: sifive,plic-1.0.0
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- items:
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- enum:
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- allwinner,sun20i-d1-plic
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- const: thead,c900-plic
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reg:
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maxItems: 1

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