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Merge tag 'dmaengine-fix-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine fixes from Vinod Koul: - HAS_IOMEM fixes for fsl edma and intel idma - return-value fix, interrupt vector setting and typo fix for xilinx xdma - email updates for codeaurora email domain move - correct pause status for pl330 driver - idxd clear flag on disable fix - function documentation fix for owl dma - potential un-allocated memory fix for mcf driver * tag 'dmaengine-fix-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: dmaengine: xilinx: xdma: Fix typo dmaengine: xilinx: xdma: Fix interrupt vector setting dmaengine: owl-dma: Modify mismatched function name dmaengine: idxd: Clear PRS disable flag when disabling IDXD device dmaengine: pl330: Return DMA_PAUSED when transaction is paused dmaengine: qcom_hidma: Update codeaurora email domain dmaengine: mcf-edma: Fix a potential un-allocated memory access dmaengine: xilinx: xdma: Fix Judgment of the return value idmaengine: make FSL_EDMA and INTEL_IDMA64 depends on HAS_IOMEM
2 parents 374a7f4 + 422dbc6 commit 3081365

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Documentation/ABI/testing/sysfs-platform-hidma

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@ What: /sys/devices/platform/hidma-*/chid
22
/sys/devices/platform/QCOM8061:*/chid
33
Date: Dec 2015
44
KernelVersion: 4.4
5-
Contact: "Sinan Kaya <okaya@codeaurora.org>"
5+
Contact: "Sinan Kaya <okaya@kernel.org>"
66
Description:
77
Contains the ID of the channel within the HIDMA instance.
88
It is used to associate a given HIDMA channel with the

Documentation/ABI/testing/sysfs-platform-hidma-mgmt

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@ What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/priority
22
/sys/devices/platform/QCOM8060:*/chanops/chan*/priority
33
Date: Nov 2015
44
KernelVersion: 4.4
5-
Contact: "Sinan Kaya <okaya@codeaurora.org>"
5+
Contact: "Sinan Kaya <okaya@kernel.org>"
66
Description:
77
Contains either 0 or 1 and indicates if the DMA channel is a
88
low priority (0) or high priority (1) channel.
@@ -11,7 +11,7 @@ What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/weight
1111
/sys/devices/platform/QCOM8060:*/chanops/chan*/weight
1212
Date: Nov 2015
1313
KernelVersion: 4.4
14-
Contact: "Sinan Kaya <okaya@codeaurora.org>"
14+
Contact: "Sinan Kaya <okaya@kernel.org>"
1515
Description:
1616
Contains 0..15 and indicates the weight of the channel among
1717
equal priority channels during round robin scheduling.
@@ -20,7 +20,7 @@ What: /sys/devices/platform/hidma-mgmt*/chreset_timeout_cycles
2020
/sys/devices/platform/QCOM8060:*/chreset_timeout_cycles
2121
Date: Nov 2015
2222
KernelVersion: 4.4
23-
Contact: "Sinan Kaya <okaya@codeaurora.org>"
23+
Contact: "Sinan Kaya <okaya@kernel.org>"
2424
Description:
2525
Contains the platform specific cycle value to wait after a
2626
reset command is issued. If the value is chosen too short,
@@ -32,7 +32,7 @@ What: /sys/devices/platform/hidma-mgmt*/dma_channels
3232
/sys/devices/platform/QCOM8060:*/dma_channels
3333
Date: Nov 2015
3434
KernelVersion: 4.4
35-
Contact: "Sinan Kaya <okaya@codeaurora.org>"
35+
Contact: "Sinan Kaya <okaya@kernel.org>"
3636
Description:
3737
Contains the number of dma channels supported by one instance
3838
of HIDMA hardware. The value may change from chip to chip.
@@ -41,23 +41,23 @@ What: /sys/devices/platform/hidma-mgmt*/hw_version_major
4141
/sys/devices/platform/QCOM8060:*/hw_version_major
4242
Date: Nov 2015
4343
KernelVersion: 4.4
44-
Contact: "Sinan Kaya <okaya@codeaurora.org>"
44+
Contact: "Sinan Kaya <okaya@kernel.org>"
4545
Description:
4646
Version number major for the hardware.
4747

4848
What: /sys/devices/platform/hidma-mgmt*/hw_version_minor
4949
/sys/devices/platform/QCOM8060:*/hw_version_minor
5050
Date: Nov 2015
5151
KernelVersion: 4.4
52-
Contact: "Sinan Kaya <okaya@codeaurora.org>"
52+
Contact: "Sinan Kaya <okaya@kernel.org>"
5353
Description:
5454
Version number minor for the hardware.
5555

5656
What: /sys/devices/platform/hidma-mgmt*/max_rd_xactions
5757
/sys/devices/platform/QCOM8060:*/max_rd_xactions
5858
Date: Nov 2015
5959
KernelVersion: 4.4
60-
Contact: "Sinan Kaya <okaya@codeaurora.org>"
60+
Contact: "Sinan Kaya <okaya@kernel.org>"
6161
Description:
6262
Contains a value between 0 and 31. Maximum number of
6363
read transactions that can be issued back to back.
@@ -69,7 +69,7 @@ What: /sys/devices/platform/hidma-mgmt*/max_read_request
6969
/sys/devices/platform/QCOM8060:*/max_read_request
7070
Date: Nov 2015
7171
KernelVersion: 4.4
72-
Contact: "Sinan Kaya <okaya@codeaurora.org>"
72+
Contact: "Sinan Kaya <okaya@kernel.org>"
7373
Description:
7474
Size of each read request. The value needs to be a power
7575
of two and can be between 128 and 1024.
@@ -78,7 +78,7 @@ What: /sys/devices/platform/hidma-mgmt*/max_wr_xactions
7878
/sys/devices/platform/QCOM8060:*/max_wr_xactions
7979
Date: Nov 2015
8080
KernelVersion: 4.4
81-
Contact: "Sinan Kaya <okaya@codeaurora.org>"
81+
Contact: "Sinan Kaya <okaya@kernel.org>"
8282
Description:
8383
Contains a value between 0 and 31. Maximum number of
8484
write transactions that can be issued back to back.
@@ -91,7 +91,7 @@ What: /sys/devices/platform/hidma-mgmt*/max_write_request
9191
/sys/devices/platform/QCOM8060:*/max_write_request
9292
Date: Nov 2015
9393
KernelVersion: 4.4
94-
Contact: "Sinan Kaya <okaya@codeaurora.org>"
94+
Contact: "Sinan Kaya <okaya@kernel.org>"
9595
Description:
9696
Size of each write request. The value needs to be a power
9797
of two and can be between 128 and 1024.

drivers/dma/Kconfig

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -211,6 +211,7 @@ config FSL_DMA
211211
config FSL_EDMA
212212
tristate "Freescale eDMA engine support"
213213
depends on OF
214+
depends on HAS_IOMEM
214215
select DMA_ENGINE
215216
select DMA_VIRTUAL_CHANNELS
216217
help
@@ -280,6 +281,7 @@ config IMX_SDMA
280281

281282
config INTEL_IDMA64
282283
tristate "Intel integrated DMA 64-bit support"
284+
depends on HAS_IOMEM
283285
select DMA_ENGINE
284286
select DMA_VIRTUAL_CHANNELS
285287
help

drivers/dma/idxd/device.c

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -384,9 +384,7 @@ static void idxd_wq_disable_cleanup(struct idxd_wq *wq)
384384
wq->threshold = 0;
385385
wq->priority = 0;
386386
wq->enqcmds_retries = IDXD_ENQCMDS_RETRIES;
387-
clear_bit(WQ_FLAG_DEDICATED, &wq->flags);
388-
clear_bit(WQ_FLAG_BLOCK_ON_FAULT, &wq->flags);
389-
clear_bit(WQ_FLAG_ATS_DISABLE, &wq->flags);
387+
wq->flags = 0;
390388
memset(wq->name, 0, WQ_NAME_SIZE);
391389
wq->max_xfer_bytes = WQ_DEFAULT_MAX_XFER;
392390
idxd_wq_set_max_batch_size(idxd->data->type, wq, WQ_DEFAULT_MAX_BATCH);

drivers/dma/mcf-edma.c

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -190,7 +190,13 @@ static int mcf_edma_probe(struct platform_device *pdev)
190190
return -EINVAL;
191191
}
192192

193-
chans = pdata->dma_channels;
193+
if (!pdata->dma_channels) {
194+
dev_info(&pdev->dev, "setting default channel number to 64");
195+
chans = 64;
196+
} else {
197+
chans = pdata->dma_channels;
198+
}
199+
194200
len = sizeof(*mcf_edma) + sizeof(*mcf_chan) * chans;
195201
mcf_edma = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
196202
if (!mcf_edma)
@@ -202,11 +208,6 @@ static int mcf_edma_probe(struct platform_device *pdev)
202208
mcf_edma->drvdata = &mcf_data;
203209
mcf_edma->big_endian = 1;
204210

205-
if (!mcf_edma->n_chans) {
206-
dev_info(&pdev->dev, "setting default channel number to 64");
207-
mcf_edma->n_chans = 64;
208-
}
209-
210211
mutex_init(&mcf_edma->fsl_edma_mutex);
211212

212213
mcf_edma->membase = devm_platform_ioremap_resource(pdev, 0);

drivers/dma/owl-dma.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -192,7 +192,7 @@ struct owl_dma_pchan {
192192
};
193193

194194
/**
195-
* struct owl_dma_pchan - Wrapper for DMA ENGINE channel
195+
* struct owl_dma_vchan - Wrapper for DMA ENGINE channel
196196
* @vc: wrapped virtual channel
197197
* @pchan: the physical channel utilized by this channel
198198
* @txd: active transaction on this channel

drivers/dma/pl330.c

Lines changed: 16 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -403,6 +403,12 @@ enum desc_status {
403403
* of a channel can be BUSY at any time.
404404
*/
405405
BUSY,
406+
/*
407+
* Pause was called while descriptor was BUSY. Due to hardware
408+
* limitations, only termination is possible for descriptors
409+
* that have been paused.
410+
*/
411+
PAUSED,
406412
/*
407413
* Sitting on the channel work_list but xfer done
408414
* by PL330 core
@@ -2041,7 +2047,7 @@ static inline void fill_queue(struct dma_pl330_chan *pch)
20412047
list_for_each_entry(desc, &pch->work_list, node) {
20422048

20432049
/* If already submitted */
2044-
if (desc->status == BUSY)
2050+
if (desc->status == BUSY || desc->status == PAUSED)
20452051
continue;
20462052

20472053
ret = pl330_submit_req(pch->thread, desc);
@@ -2326,6 +2332,7 @@ static int pl330_pause(struct dma_chan *chan)
23262332
{
23272333
struct dma_pl330_chan *pch = to_pchan(chan);
23282334
struct pl330_dmac *pl330 = pch->dmac;
2335+
struct dma_pl330_desc *desc;
23292336
unsigned long flags;
23302337

23312338
pm_runtime_get_sync(pl330->ddma.dev);
@@ -2335,6 +2342,10 @@ static int pl330_pause(struct dma_chan *chan)
23352342
_stop(pch->thread);
23362343
spin_unlock(&pl330->lock);
23372344

2345+
list_for_each_entry(desc, &pch->work_list, node) {
2346+
if (desc->status == BUSY)
2347+
desc->status = PAUSED;
2348+
}
23382349
spin_unlock_irqrestore(&pch->lock, flags);
23392350
pm_runtime_mark_last_busy(pl330->ddma.dev);
23402351
pm_runtime_put_autosuspend(pl330->ddma.dev);
@@ -2425,7 +2436,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
24252436
else if (running && desc == running)
24262437
transferred =
24272438
pl330_get_current_xferred_count(pch, desc);
2428-
else if (desc->status == BUSY)
2439+
else if (desc->status == BUSY || desc->status == PAUSED)
24292440
/*
24302441
* Busy but not running means either just enqueued,
24312442
* or finished and not yet marked done
@@ -2442,6 +2453,9 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
24422453
case DONE:
24432454
ret = DMA_COMPLETE;
24442455
break;
2456+
case PAUSED:
2457+
ret = DMA_PAUSED;
2458+
break;
24452459
case PREP:
24462460
case BUSY:
24472461
ret = DMA_IN_PROGRESS;

drivers/dma/xilinx/xdma.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -668,6 +668,8 @@ static int xdma_set_vector_reg(struct xdma_device *xdev, u32 vec_tbl_start,
668668
val |= irq_start << shift;
669669
irq_start++;
670670
irq_num--;
671+
if (!irq_num)
672+
break;
671673
}
672674

673675
/* write IRQ register */
@@ -715,7 +717,7 @@ static int xdma_irq_init(struct xdma_device *xdev)
715717
ret = request_irq(irq, xdma_channel_isr, 0,
716718
"xdma-c2h-channel", &xdev->c2h_chans[j]);
717719
if (ret) {
718-
xdma_err(xdev, "H2C channel%d request irq%d failed: %d",
720+
xdma_err(xdev, "C2H channel%d request irq%d failed: %d",
719721
j, irq, ret);
720722
goto failed_init_c2h;
721723
}
@@ -892,7 +894,7 @@ static int xdma_probe(struct platform_device *pdev)
892894
}
893895

894896
reg_base = devm_ioremap_resource(&pdev->dev, res);
895-
if (!reg_base) {
897+
if (IS_ERR(reg_base)) {
896898
xdma_err(xdev, "ioremap failed");
897899
goto failed;
898900
}

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