Skip to content

Commit 2b727b3

Browse files
Brady Noranderbroonie
authored andcommitted
ASoC: dwc: always enable/disable i2s irqs
Commit a42e988 ("ASoC: dwc: add DMA handshake control") changed the behavior of the driver to not enable or disable i2s irqs if using DMA. This breaks platforms such as AMD ACP. Audio playback appears to work but no audio can be heard. Revert to the old behavior by always enabling and disabling i2s irqs while keeping DMA handshake control. Fixes: a42e988 ("ASoC: dwc: add DMA handshake control") Signed-off-by: Brady Norander <bradynorander@gmail.com> Link: https://patch.msgid.link/20250330130852.37881-3-bradynorander@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
1 parent dfcf3dd commit 2b727b3

File tree

1 file changed

+6
-7
lines changed

1 file changed

+6
-7
lines changed

sound/soc/dwc/dwc-i2s.c

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -199,12 +199,10 @@ static void i2s_start(struct dw_i2s_dev *dev,
199199
else
200200
i2s_write_reg(dev->i2s_base, IRER, 1);
201201

202-
/* I2S needs to enable IRQ to make a handshake with DMAC on the JH7110 SoC */
203-
if (dev->use_pio || dev->is_jh7110)
204-
i2s_enable_irqs(dev, substream->stream, config->chan_nr);
205-
else
202+
if (!(dev->use_pio || dev->is_jh7110))
206203
i2s_enable_dma(dev, substream->stream);
207204

205+
i2s_enable_irqs(dev, substream->stream, config->chan_nr);
208206
i2s_write_reg(dev->i2s_base, CER, 1);
209207
}
210208

@@ -218,11 +216,12 @@ static void i2s_stop(struct dw_i2s_dev *dev,
218216
else
219217
i2s_write_reg(dev->i2s_base, IRER, 0);
220218

221-
if (dev->use_pio || dev->is_jh7110)
222-
i2s_disable_irqs(dev, substream->stream, 8);
223-
else
219+
if (!(dev->use_pio || dev->is_jh7110))
224220
i2s_disable_dma(dev, substream->stream);
225221

222+
i2s_disable_irqs(dev, substream->stream, 8);
223+
224+
226225
if (!dev->active) {
227226
i2s_write_reg(dev->i2s_base, CER, 0);
228227
i2s_write_reg(dev->i2s_base, IER, 0);

0 commit comments

Comments
 (0)