Skip to content

Commit 2b3a419

Browse files
torvaldstorvalds
committed
Merge tag 'dmaengine-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul: "New hardware support: - Allwinner H616 dma support - Renesas r8a779h0 dma controller support - TI CSI2RX dma support Updates: - Freescale edma driver updates for TCD64csupport for i.MX95 - constify of pointers and args - Yaml conversion for MediaTek High-Speed controller binding - TI k3 udma support for TX/RX DMA channels for thread IDs: * tag 'dmaengine-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (25 commits) dmaengine: of: constify of_phandle_args in of_dma_find_controller() dmaengine: pl08x: constify pointer to char in filter function MAINTAINERS: change in AMD ptdma maintainer MAINTAINERS: adjust file entry in MEDIATEK DMA DRIVER dmaengine: idxd: constify the struct device_type usage dt-bindings: renesas,rcar-dmac: Add r8a779h0 support dt-bindings: dma: convert MediaTek High-Speed controller to the json-schema dmaengine: idxd: make dsa_bus_type const dmaengine: fsl-edma: integrate TCD64 support for i.MX95 dt-bindings: fsl-dma: fsl-edma: add fsl,imx95-edma5 compatible string dmaengine: mcf-edma: utilize edma_write_tcdreg() macro for TCD Access dmaengine: fsl-edma: add address for channel mux register in fsl_edma_chan dmaengine: fsl-edma: fix spare build warning dmaengine: fsl-edma: involve help macro fsl_edma_set(get)_tcd() dt-bindings: mmp-dma: convert to YAML dmaengine: ti: k3-psil-j721s2: Add entry for CSI2RX dmaengine: ti: k3-udma-glue: Add function to request RX chan for thread ID dmaengine: ti: k3-udma-glue: Add function to request TX chan for thread ID dmaengine: ti: k3-udma-glue: Update name for remote RX channel device dmaengine: ti: k3-udma-glue: Add function to parse channel by ID ...
2 parents b898db9 + 716141d commit 2b3a419

25 files changed

+698
-294
lines changed

‎Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,9 @@ properties:
2828
- items:
2929
- const: allwinner,sun8i-r40-dma
3030
- const: allwinner,sun50i-a64-dma
31+
- items:
32+
- const: allwinner,sun50i-h616-dma
33+
- const: allwinner,sun50i-a100-dma
3134

3235
reg:
3336
maxItems: 1
@@ -59,10 +62,11 @@ required:
5962
if:
6063
properties:
6164
compatible:
62-
enum:
63-
- allwinner,sun20i-d1-dma
64-
- allwinner,sun50i-a100-dma
65-
- allwinner,sun50i-h6-dma
65+
contains:
66+
enum:
67+
- allwinner,sun20i-d1-dma
68+
- allwinner,sun50i-a100-dma
69+
- allwinner,sun50i-h6-dma
6670

6771
then:
6872
properties:

‎Documentation/devicetree/bindings/dma/fsl,edma.yaml

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@ properties:
2525
- fsl,imx8qm-edma
2626
- fsl,imx93-edma3
2727
- fsl,imx93-edma4
28+
- fsl,imx95-edma5
2829
- items:
2930
- const: fsl,ls1028a-edma
3031
- const: fsl,vf610-edma
@@ -83,6 +84,7 @@ allOf:
8384
- fsl,imx8qm-edma
8485
- fsl,imx93-edma3
8586
- fsl,imx93-edma4
87+
- fsl,imx95-edma5
8688
then:
8789
properties:
8890
"#dma-cells":

‎Documentation/devicetree/bindings/dma/marvell,mmp-dma.yaml

Lines changed: 72 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,72 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/dma/marvell,mmp-dma.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Marvell MMP DMA controller
8+
9+
maintainers:
10+
- Duje Mihanović <duje.mihanovic@skole.hr>
11+
12+
description:
13+
Marvell MMP SoCs may have two types of DMA controllers, peripheral and audio.
14+
15+
properties:
16+
compatible:
17+
enum:
18+
- marvell,pdma-1.0
19+
- marvell,adma-1.0
20+
- marvell,pxa910-squ
21+
22+
reg:
23+
maxItems: 1
24+
25+
interrupts:
26+
description:
27+
Interrupt lines for the controller, may be shared or one per DMA channel
28+
minItems: 1
29+
30+
asram:
31+
description:
32+
A phandle to the SRAM pool
33+
$ref: /schemas/types.yaml#/definitions/phandle
34+
35+
'#dma-channels':
36+
deprecated: true
37+
38+
'#dma-requests':
39+
deprecated: true
40+
41+
required:
42+
- compatible
43+
- reg
44+
- interrupts
45+
- '#dma-cells'
46+
47+
allOf:
48+
- $ref: dma-controller.yaml#
49+
- if:
50+
properties:
51+
compatible:
52+
contains:
53+
enum:
54+
- marvell,pdma-1.0
55+
then:
56+
properties:
57+
asram: false
58+
else:
59+
required:
60+
- asram
61+
62+
unevaluatedProperties: false
63+
64+
examples:
65+
- |
66+
dma-controller@d4000000 {
67+
compatible = "marvell,pdma-1.0";
68+
reg = <0xd4000000 0x10000>;
69+
interrupts = <47>;
70+
#dma-cells = <2>;
71+
dma-channels = <16>;
72+
};

‎Documentation/devicetree/bindings/dma/mediatek,mt7622-hsdma.yaml

Lines changed: 63 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,63 @@
1+
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/dma/mediatek,mt7622-hsdma.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: MediaTek High-Speed DMA Controller
8+
9+
maintainers:
10+
- Sean Wang <sean.wang@mediatek.com>
11+
12+
allOf:
13+
- $ref: dma-controller.yaml#
14+
15+
properties:
16+
compatible:
17+
enum:
18+
- mediatek,mt7622-hsdma
19+
- mediatek,mt7623-hsdma
20+
21+
reg:
22+
maxItems: 1
23+
24+
interrupts:
25+
maxItems: 1
26+
27+
clocks:
28+
maxItems: 1
29+
30+
clock-names:
31+
const: hsdma
32+
33+
power-domains:
34+
maxItems: 1
35+
36+
"#dma-cells":
37+
description: Channel number
38+
const: 1
39+
40+
required:
41+
- reg
42+
- interrupts
43+
- clocks
44+
- clock-names
45+
- power-domains
46+
47+
unevaluatedProperties: false
48+
49+
examples:
50+
- |
51+
#include <dt-bindings/clock/mt2701-clk.h>
52+
#include <dt-bindings/interrupt-controller/arm-gic.h>
53+
#include <dt-bindings/power/mt2701-power.h>
54+
55+
dma-controller@1b007000 {
56+
compatible = "mediatek,mt7623-hsdma";
57+
reg = <0x1b007000 0x1000>;
58+
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>;
59+
clocks = <&ethsys CLK_ETHSYS_HSDMA>;
60+
clock-names = "hsdma";
61+
power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
62+
#dma-cells = <1>;
63+
};

‎Documentation/devicetree/bindings/dma/mmp-dma.txt

Lines changed: 0 additions & 81 deletions
This file was deleted.

‎Documentation/devicetree/bindings/dma/mtk-hsdma.txt

Lines changed: 0 additions & 33 deletions
This file was deleted.

‎Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,7 @@ properties:
4646
- renesas,dmac-r8a779a0 # R-Car V3U
4747
- renesas,dmac-r8a779f0 # R-Car S4-8
4848
- renesas,dmac-r8a779g0 # R-Car V4H
49+
- renesas,dmac-r8a779h0 # R-Car V4M
4950
- const: renesas,rcar-gen4-dmac # R-Car Gen4
5051

5152
reg: true

‎MAINTAINERS

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1064,7 +1064,7 @@ F: include/linux/amd-pstate.h
10641064
F: tools/power/x86/amd_pstate_tracer/amd_pstate_trace.py
10651065

10661066
AMD PTDMA DRIVER
1067-
M: Sanjay R Mehta <sanju.mehta@amd.com>
1067+
M: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
10681068
L: dmaengine@vger.kernel.org
10691069
S: Maintained
10701070
F: drivers/dma/ptdma/
@@ -13719,7 +13719,7 @@ L: dmaengine@vger.kernel.org
1371913719
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1372013720
L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
1372113721
S: Maintained
13722-
F: Documentation/devicetree/bindings/dma/mtk-*
13722+
F: Documentation/devicetree/bindings/dma/mediatek,*
1372313723
F: drivers/dma/mediatek/
1372413724

1372513725
MEDIATEK ETHERNET DRIVER

‎drivers/dma/Kconfig

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -643,16 +643,16 @@ config TEGRA20_APB_DMA
643643

644644
config TEGRA210_ADMA
645645
tristate "NVIDIA Tegra210 ADMA support"
646-
depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
646+
depends on (ARCH_TEGRA || COMPILE_TEST)
647647
select DMA_ENGINE
648648
select DMA_VIRTUAL_CHANNELS
649649
help
650-
Support for the NVIDIA Tegra210 ADMA controller driver. The
651-
DMA controller has multiple DMA channels and is used to service
652-
various audio clients in the Tegra210 audio processing engine
653-
(APE). This DMA controller transfers data from memory to
654-
peripheral and vice versa. It does not support memory to
655-
memory data transfer.
650+
Support for the NVIDIA Tegra210/Tegra186/Tegra194/Tegra234 ADMA
651+
controller driver. The DMA controller has multiple DMA channels
652+
and is used to service various audio clients in the Tegra210
653+
audio processing engine (APE). This DMA controller transfers
654+
data from memory to peripheral and vice versa. It does not
655+
support memory to memory data transfer.
656656

657657
config TIMB_DMA
658658
tristate "Timberdale FPGA DMA support"

‎drivers/dma/amba-pl08x.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2239,7 +2239,7 @@ static int pl08x_resume(struct dma_chan *chan)
22392239
bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
22402240
{
22412241
struct pl08x_dma_chan *plchan;
2242-
char *name = chan_id;
2242+
const char *name = chan_id;
22432243

22442244
/* Reject channels for devices not bound to this driver */
22452245
if (chan->device->dev->driver != &pl08x_amba_driver.drv)

0 commit comments

Comments
 (0)