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Merge branch 'net-axienet-introduce-dmaengine'
Radhey Shyam Pandey says: ==================== net: axienet: Introduce dmaengine The axiethernet driver can use the dmaengine framework to communicate with the xilinx DMAengine driver(AXIDMA, MCDMA). The inspiration behind this dmaengine adoption is to reuse the in-kernel xilinx dma engine driver[1] and remove redundant dma programming sequence[2] from the ethernet driver. This simplifies the ethernet driver and also makes it generic to be hooked to any complaint dma IP i.e AXIDMA, MCDMA without any modification. The dmaengine framework was extended for metadata API support during the axidma RFC[3] discussion. However, it still needs further enhancements to make it well suited for ethernet usecases. Comments, suggestions, thoughts to implement remaining functional features are very welcome! [1]: https://github.com/torvalds/linux/blob/master/drivers/dma/xilinx/xilinx_dma.c [2]: https://github.com/torvalds/linux/blob/master/drivers/net/ethernet/xilinx/xilinx_axienet_main.c#L238 [3]: http://lkml.iu.edu/hypermail/linux/kernel/1804.0/00367.html [4]: https://lore.kernel.org/all/20221124102745.2620370-1-sarath.babu.naidu.gaddam@amd.com ==================== Link: https://lore.kernel.org/r/1700074613-1977070-1-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml

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@@ -122,6 +122,20 @@ properties:
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and "phy-handle" should point to an external PHY if exists.
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maxItems: 1
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dmas:
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minItems: 2
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maxItems: 32
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description: TX and RX DMA channel phandle
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dma-names:
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items:
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pattern: "^[tr]x_chan([0-9]|1[0-5])$"
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description:
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Should be "tx_chan0", "tx_chan1" ... "tx_chan15" for DMA Tx channel
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Should be "rx_chan0", "rx_chan1" ... "rx_chan15" for DMA Rx channel
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minItems: 2
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maxItems: 32
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required:
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- compatible
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- interrupts
@@ -143,6 +157,8 @@ examples:
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clocks = <&axi_clk>, <&axi_clk>, <&pl_enet_ref_clk>, <&mgt_clk>;
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phy-mode = "mii";
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reg = <0x40c00000 0x40000>,<0x50c00000 0x40000>;
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dmas = <&xilinx_dma 0>, <&xilinx_dma 1>;
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dma-names = "tx_chan0", "rx_chan0";
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xlnx,rxcsum = <0x2>;
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xlnx,rxmem = <0x800>;
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xlnx,txcsum = <0x2>;

drivers/net/ethernet/xilinx/Kconfig

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@@ -26,6 +26,7 @@ config XILINX_EMACLITE
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config XILINX_AXI_EMAC
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tristate "Xilinx 10/100/1000 AXI Ethernet support"
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depends on HAS_IOMEM
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depends on XILINX_DMA
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select PHYLINK
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help
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This driver supports the 10/100/1000 Ethernet from Xilinx for the

drivers/net/ethernet/xilinx/xilinx_axienet.h

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@@ -14,6 +14,7 @@
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#include <linux/interrupt.h>
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#include <linux/if_vlan.h>
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#include <linux/phylink.h>
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#include <linux/skbuff.h>
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/* Packet size info */
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#define XAE_HDR_SIZE 14 /* Size of Ethernet header */
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#define XAE_NUM_MISC_CLOCKS 3
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/**
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* struct skbuf_dma_descriptor - skb for each dma descriptor
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* @sgl: Pointer for sglist.
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* @desc: Pointer to dma descriptor.
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* @dma_address: dma address of sglist.
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* @skb: Pointer to SKB transferred using DMA
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* @sg_len: number of entries in the sglist.
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*/
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struct skbuf_dma_descriptor {
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struct scatterlist sgl[MAX_SKB_FRAGS + 1];
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struct dma_async_tx_descriptor *desc;
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dma_addr_t dma_address;
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struct sk_buff *skb;
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int sg_len;
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};
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/**
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* struct axienet_local - axienet private per device data
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* @ndev: Pointer for net_device to which it will be attached.
@@ -435,6 +452,15 @@ struct axidma_bd {
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* @coalesce_usec_rx: IRQ coalesce delay for RX
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* @coalesce_count_tx: Store the irq coalesce on TX side.
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* @coalesce_usec_tx: IRQ coalesce delay for TX
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* @use_dmaengine: flag to check dmaengine framework usage.
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* @tx_chan: TX DMA channel.
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* @rx_chan: RX DMA channel.
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* @tx_skb_ring: Pointer to TX skb ring buffer array.
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* @rx_skb_ring: Pointer to RX skb ring buffer array.
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* @tx_ring_head: TX skb ring buffer head index.
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* @tx_ring_tail: TX skb ring buffer tail index.
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* @rx_ring_head: RX skb ring buffer head index.
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* @rx_ring_tail: RX skb ring buffer tail index.
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*/
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struct axienet_local {
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struct net_device *ndev;
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u32 coalesce_usec_rx;
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u32 coalesce_count_tx;
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u32 coalesce_usec_tx;
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u8 use_dmaengine;
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struct dma_chan *tx_chan;
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struct dma_chan *rx_chan;
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struct skbuf_dma_descriptor **tx_skb_ring;
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struct skbuf_dma_descriptor **rx_skb_ring;
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int tx_ring_head;
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int tx_ring_tail;
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int rx_ring_head;
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int rx_ring_tail;
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};
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/**

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