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4 | 4 | * Copyright (C) 2014, Freescale Semiconductor, Inc.
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5 | 5 | */
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6 | 6 |
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| 7 | +#include <linux/bitfield.h> |
7 | 8 | #include <linux/device.h>
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8 | 9 | #include <linux/mtd/spi-nor.h>
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9 | 10 |
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28 | 29 | #define SPINOR_REG_CYPRESS_CFR2 0x3
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29 | 30 | #define SPINOR_REG_CYPRESS_CFR2V \
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30 | 31 | (SPINOR_REG_CYPRESS_VREG + SPINOR_REG_CYPRESS_CFR2)
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| 32 | +#define SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASK GENMASK(3, 0) |
31 | 33 | #define SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24 0xb
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32 | 34 | #define SPINOR_REG_CYPRESS_CFR2_ADRBYT BIT(7)
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33 | 35 | #define SPINOR_REG_CYPRESS_CFR3 0x4
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@@ -161,8 +163,18 @@ static int cypress_nor_octal_dtr_en(struct spi_nor *nor)
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161 | 163 | int ret;
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162 | 164 | u8 addr_mode_nbytes = nor->params->addr_mode_nbytes;
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163 | 165 |
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| 166 | + op = (struct spi_mem_op) |
| 167 | + CYPRESS_NOR_RD_ANY_REG_OP(addr_mode_nbytes, |
| 168 | + SPINOR_REG_CYPRESS_CFR2V, 0, buf); |
| 169 | + |
| 170 | + ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto); |
| 171 | + if (ret) |
| 172 | + return ret; |
| 173 | + |
164 | 174 | /* Use 24 dummy cycles for memory array reads. */
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165 |
| - *buf = SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24; |
| 175 | + *buf &= ~SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASK; |
| 176 | + *buf |= FIELD_PREP(SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASK, |
| 177 | + SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24); |
166 | 178 | op = (struct spi_mem_op)
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167 | 179 | CYPRESS_NOR_WR_ANY_REG_OP(addr_mode_nbytes,
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168 | 180 | SPINOR_REG_CYPRESS_CFR2V, 1, buf);
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