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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
| 2 | +/* |
| 3 | + * Copyright (c) 2022 MediaTek Inc. |
| 4 | + * Author: Garmin Chang <garmin.chang@mediatek.com> |
| 5 | + */ |
| 6 | + |
| 7 | +#include <dt-bindings/clock/mediatek,mt8188-clk.h> |
| 8 | +#include <linux/clk-provider.h> |
| 9 | +#include <linux/platform_device.h> |
| 10 | + |
| 11 | +#include "clk-gate.h" |
| 12 | +#include "clk-mtk.h" |
| 13 | + |
| 14 | +static const struct mtk_gate_regs imp_iic_wrap_cg_regs = { |
| 15 | + .set_ofs = 0xe08, |
| 16 | + .clr_ofs = 0xe04, |
| 17 | + .sta_ofs = 0xe00, |
| 18 | +}; |
| 19 | + |
| 20 | +#define GATE_IMP_IIC_WRAP(_id, _name, _parent, _shift) \ |
| 21 | + GATE_MTK_FLAGS(_id, _name, _parent, &imp_iic_wrap_cg_regs, _shift, \ |
| 22 | + &mtk_clk_gate_ops_setclr, CLK_OPS_PARENT_ENABLE) |
| 23 | + |
| 24 | +static const struct mtk_gate imp_iic_wrap_c_clks[] = { |
| 25 | + GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_C_AP_CLOCK_I2C0, |
| 26 | + "imp_iic_wrap_c_ap_clock_i2c0", "top_i2c", 0), |
| 27 | + GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_C_AP_CLOCK_I2C2, |
| 28 | + "imp_iic_wrap_c_ap_clock_i2c2", "top_i2c", 1), |
| 29 | + GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_C_AP_CLOCK_I2C3, |
| 30 | + "imp_iic_wrap_c_ap_clock_i2c3", "top_i2c", 2), |
| 31 | +}; |
| 32 | + |
| 33 | +static const struct mtk_gate imp_iic_wrap_w_clks[] = { |
| 34 | + GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_AP_CLOCK_I2C1, |
| 35 | + "imp_iic_wrap_w_ap_clock_i2c1", "top_i2c", 0), |
| 36 | + GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_AP_CLOCK_I2C4, |
| 37 | + "imp_iic_wrap_w_ap_clock_i2c4", "top_i2c", 1), |
| 38 | +}; |
| 39 | + |
| 40 | +static const struct mtk_gate imp_iic_wrap_en_clks[] = { |
| 41 | + GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_EN_AP_CLOCK_I2C5, |
| 42 | + "imp_iic_wrap_en_ap_clock_i2c5", "top_i2c", 0), |
| 43 | + GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_EN_AP_CLOCK_I2C6, |
| 44 | + "imp_iic_wrap_en_ap_clock_i2c6", "top_i2c", 1), |
| 45 | +}; |
| 46 | + |
| 47 | +static const struct mtk_clk_desc imp_iic_wrap_c_desc = { |
| 48 | + .clks = imp_iic_wrap_c_clks, |
| 49 | + .num_clks = ARRAY_SIZE(imp_iic_wrap_c_clks), |
| 50 | +}; |
| 51 | + |
| 52 | +static const struct mtk_clk_desc imp_iic_wrap_w_desc = { |
| 53 | + .clks = imp_iic_wrap_w_clks, |
| 54 | + .num_clks = ARRAY_SIZE(imp_iic_wrap_w_clks), |
| 55 | +}; |
| 56 | + |
| 57 | +static const struct mtk_clk_desc imp_iic_wrap_en_desc = { |
| 58 | + .clks = imp_iic_wrap_en_clks, |
| 59 | + .num_clks = ARRAY_SIZE(imp_iic_wrap_en_clks), |
| 60 | +}; |
| 61 | + |
| 62 | +static const struct of_device_id of_match_clk_mt8188_imp_iic_wrap[] = { |
| 63 | + { .compatible = "mediatek,mt8188-imp-iic-wrap-c", .data = &imp_iic_wrap_c_desc }, |
| 64 | + { .compatible = "mediatek,mt8188-imp-iic-wrap-w", .data = &imp_iic_wrap_w_desc }, |
| 65 | + { .compatible = "mediatek,mt8188-imp-iic-wrap-en", .data = &imp_iic_wrap_en_desc }, |
| 66 | + { /* sentinel */ } |
| 67 | +}; |
| 68 | +MODULE_DEVICE_TABLE(platform, of_match_clk_mt8188_imp_iic_wrap); |
| 69 | + |
| 70 | +static struct platform_driver clk_mt8188_imp_iic_wrap_drv = { |
| 71 | + .probe = mtk_clk_simple_probe, |
| 72 | + .remove = mtk_clk_simple_remove, |
| 73 | + .driver = { |
| 74 | + .name = "clk-mt8188-imp_iic_wrap", |
| 75 | + .of_match_table = of_match_clk_mt8188_imp_iic_wrap, |
| 76 | + }, |
| 77 | +}; |
| 78 | + |
| 79 | +module_platform_driver(clk_mt8188_imp_iic_wrap_drv); |
| 80 | +MODULE_LICENSE("GPL"); |
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