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torvaldstorvalds
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Merge tag 'char-misc-6.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver fixes from Greg KH: "Here are three tiny driver fixes for 6.0-rc7. They include: - phy driver reset bugfix - fpga memleak bugfix - counter irq config bugfix The first two have been in linux-next for a while, the last one has only been added to my tree in the past few days, but was in linux-next under a different commit id. I couldn't pull directly from the counter tree due to some gpg key propagation issue, so I took the commit directly from email instead" * tag 'char-misc-6.0-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: counter: 104-quad-8: Fix skipped IRQ lines during events configuration fpga: m10bmc-sec: Fix possible memory leak of flash_buf phy: marvell: phy-mvebu-a3700-comphy: Remove broken reset support
2 parents 7e2cd21 + 2bc54aa commit 1a61b82

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+24
-77
lines changed

3 files changed

+24
-77
lines changed

‎drivers/counter/104-quad-8.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -449,6 +449,9 @@ static int quad8_events_configure(struct counter_device *counter)
449449
return -EINVAL;
450450
}
451451

452+
/* Enable IRQ line */
453+
irq_enabled |= BIT(event_node->channel);
454+
452455
/* Skip configuration if it is the same as previously set */
453456
if (priv->irq_trigger[event_node->channel] == next_irq_trigger)
454457
continue;
@@ -462,9 +465,6 @@ static int quad8_events_configure(struct counter_device *counter)
462465
priv->irq_trigger[event_node->channel] << 3;
463466
iowrite8(QUAD8_CTR_IOR | ior_cfg,
464467
&priv->reg->channel[event_node->channel].control);
465-
466-
/* Enable IRQ line */
467-
irq_enabled |= BIT(event_node->channel);
468468
}
469469

470470
iowrite8(irq_enabled, &priv->reg->index_interrupt);

‎drivers/fpga/intel-m10-bmc-sec-update.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -148,10 +148,6 @@ static ssize_t flash_count_show(struct device *dev,
148148
stride = regmap_get_reg_stride(sec->m10bmc->regmap);
149149
num_bits = FLASH_COUNT_SIZE * 8;
150150

151-
flash_buf = kmalloc(FLASH_COUNT_SIZE, GFP_KERNEL);
152-
if (!flash_buf)
153-
return -ENOMEM;
154-
155151
if (FLASH_COUNT_SIZE % stride) {
156152
dev_err(sec->dev,
157153
"FLASH_COUNT_SIZE (0x%x) not aligned to stride (0x%x)\n",
@@ -160,6 +156,10 @@ static ssize_t flash_count_show(struct device *dev,
160156
return -EINVAL;
161157
}
162158

159+
flash_buf = kmalloc(FLASH_COUNT_SIZE, GFP_KERNEL);
160+
if (!flash_buf)
161+
return -ENOMEM;
162+
163163
ret = regmap_bulk_read(sec->m10bmc->regmap, STAGING_FLASH_COUNT,
164164
flash_buf, FLASH_COUNT_SIZE / stride);
165165
if (ret) {

‎drivers/phy/marvell/phy-mvebu-a3700-comphy.c

Lines changed: 17 additions & 70 deletions
Original file line numberDiff line numberDiff line change
@@ -274,7 +274,6 @@ struct mvebu_a3700_comphy_lane {
274274
int submode;
275275
bool invert_tx;
276276
bool invert_rx;
277-
bool needs_reset;
278277
};
279278

280279
struct gbe_phy_init_data_fix {
@@ -1097,40 +1096,12 @@ mvebu_a3700_comphy_pcie_power_off(struct mvebu_a3700_comphy_lane *lane)
10971096
0x0, PU_PLL_BIT | PU_RX_BIT | PU_TX_BIT);
10981097
}
10991098

1100-
static int mvebu_a3700_comphy_reset(struct phy *phy)
1099+
static void mvebu_a3700_comphy_usb3_power_off(struct mvebu_a3700_comphy_lane *lane)
11011100
{
1102-
struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy);
1103-
u16 mask, data;
1104-
1105-
dev_dbg(lane->dev, "resetting lane %d\n", lane->id);
1106-
1107-
/* COMPHY reset for internal logic */
1108-
comphy_lane_reg_set(lane, COMPHY_SFT_RESET,
1109-
SFT_RST_NO_REG, SFT_RST_NO_REG);
1110-
1111-
/* COMPHY register reset (cleared automatically) */
1112-
comphy_lane_reg_set(lane, COMPHY_SFT_RESET, SFT_RST, SFT_RST);
1113-
1114-
/* PIPE soft and register reset */
1115-
data = PIPE_SOFT_RESET | PIPE_REG_RESET;
1116-
mask = data;
1117-
comphy_lane_reg_set(lane, COMPHY_PIPE_RST_CLK_CTRL, data, mask);
1118-
1119-
/* Release PIPE register reset */
1120-
comphy_lane_reg_set(lane, COMPHY_PIPE_RST_CLK_CTRL,
1121-
0x0, PIPE_REG_RESET);
1122-
1123-
/* Reset SB configuration register (only for lanes 0 and 1) */
1124-
if (lane->id == 0 || lane->id == 1) {
1125-
u32 mask, data;
1126-
1127-
data = PIN_RESET_CORE_BIT | PIN_RESET_COMPHY_BIT |
1128-
PIN_PU_PLL_BIT | PIN_PU_RX_BIT | PIN_PU_TX_BIT;
1129-
mask = data | PIN_PU_IVREF_BIT | PIN_TX_IDLE_BIT;
1130-
comphy_periph_reg_set(lane, COMPHY_PHY_CFG1, data, mask);
1131-
}
1132-
1133-
return 0;
1101+
/*
1102+
* The USB3 MAC sets the USB3 PHY to low state, so we do not
1103+
* need to power off USB3 PHY again.
1104+
*/
11341105
}
11351106

11361107
static bool mvebu_a3700_comphy_check_mode(int lane,
@@ -1171,10 +1142,6 @@ static int mvebu_a3700_comphy_set_mode(struct phy *phy, enum phy_mode mode,
11711142
(lane->mode != mode || lane->submode != submode))
11721143
return -EBUSY;
11731144

1174-
/* If changing mode, ensure reset is called */
1175-
if (lane->mode != PHY_MODE_INVALID && lane->mode != mode)
1176-
lane->needs_reset = true;
1177-
11781145
/* Just remember the mode, ->power_on() will do the real setup */
11791146
lane->mode = mode;
11801147
lane->submode = submode;
@@ -1185,22 +1152,13 @@ static int mvebu_a3700_comphy_set_mode(struct phy *phy, enum phy_mode mode,
11851152
static int mvebu_a3700_comphy_power_on(struct phy *phy)
11861153
{
11871154
struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy);
1188-
int ret;
11891155

11901156
if (!mvebu_a3700_comphy_check_mode(lane->id, lane->mode,
11911157
lane->submode)) {
11921158
dev_err(lane->dev, "invalid COMPHY mode\n");
11931159
return -EINVAL;
11941160
}
11951161

1196-
if (lane->needs_reset) {
1197-
ret = mvebu_a3700_comphy_reset(phy);
1198-
if (ret)
1199-
return ret;
1200-
1201-
lane->needs_reset = false;
1202-
}
1203-
12041162
switch (lane->mode) {
12051163
case PHY_MODE_USB_HOST_SS:
12061164
dev_dbg(lane->dev, "set lane %d to USB3 host mode\n", lane->id);
@@ -1224,38 +1182,28 @@ static int mvebu_a3700_comphy_power_off(struct phy *phy)
12241182
{
12251183
struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy);
12261184

1227-
switch (lane->mode) {
1228-
case PHY_MODE_USB_HOST_SS:
1229-
/*
1230-
* The USB3 MAC sets the USB3 PHY to low state, so we do not
1231-
* need to power off USB3 PHY again.
1232-
*/
1233-
break;
1234-
1235-
case PHY_MODE_SATA:
1236-
mvebu_a3700_comphy_sata_power_off(lane);
1237-
break;
1238-
1239-
case PHY_MODE_ETHERNET:
1185+
switch (lane->id) {
1186+
case 0:
1187+
mvebu_a3700_comphy_usb3_power_off(lane);
12401188
mvebu_a3700_comphy_ethernet_power_off(lane);
1241-
break;
1242-
1243-
case PHY_MODE_PCIE:
1189+
return 0;
1190+
case 1:
12441191
mvebu_a3700_comphy_pcie_power_off(lane);
1245-
break;
1246-
1192+
mvebu_a3700_comphy_ethernet_power_off(lane);
1193+
return 0;
1194+
case 2:
1195+
mvebu_a3700_comphy_usb3_power_off(lane);
1196+
mvebu_a3700_comphy_sata_power_off(lane);
1197+
return 0;
12471198
default:
12481199
dev_err(lane->dev, "invalid COMPHY mode\n");
12491200
return -EINVAL;
12501201
}
1251-
1252-
return 0;
12531202
}
12541203

12551204
static const struct phy_ops mvebu_a3700_comphy_ops = {
12561205
.power_on = mvebu_a3700_comphy_power_on,
12571206
.power_off = mvebu_a3700_comphy_power_off,
1258-
.reset = mvebu_a3700_comphy_reset,
12591207
.set_mode = mvebu_a3700_comphy_set_mode,
12601208
.owner = THIS_MODULE,
12611209
};
@@ -1393,8 +1341,7 @@ static int mvebu_a3700_comphy_probe(struct platform_device *pdev)
13931341
* To avoid relying on the bootloader/firmware configuration,
13941342
* power off all comphys.
13951343
*/
1396-
mvebu_a3700_comphy_reset(phy);
1397-
lane->needs_reset = false;
1344+
mvebu_a3700_comphy_power_off(phy);
13981345
}
13991346

14001347
provider = devm_of_phy_provider_register(&pdev->dev,

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