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PCI: rockchip: Simplify reset control handling by using reset_control_bulk*() function
Currently, the driver acquires and asserts/deasserts the resets individually thereby making the driver complex to read. This can be simplified by using the reset_control_bulk() APIs. Use devm_reset_control_bulk_get_exclusive() API to acquire all the resets and use reset_control_bulk_{assert/deassert}() APIs to assert/deassert them in bulk. Following the recommendations in 'Rockchip RK3399 TRM v1.3 Part2': 1. Split the reset controls into two groups as per section '17.5.8.1.1 PCIe as Root Complex'. 2. Deassert the 'Pipe, MGMT Sticky, MGMT, Core' resets in groups as per section '17.5.8.1.1 PCIe as Root Complex'. This is accomplished using the reset_control_bulk APIs. Link: https://lore.kernel.org/r/20241202151150.7393-3-linux.amoon@gmail.com Co-developed-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> [kwilczynski: squash error handling fix from https://lore.kernel.org/r/7da6ac56-af55-4436-9597-6af24df8122c@stanley.mountain] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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-129
lines changed

2 files changed

+47
-129
lines changed

‎drivers/pci/controller/pcie-rockchip.c

Lines changed: 28 additions & 122 deletions
Original file line numberDiff line numberDiff line change
@@ -30,7 +30,7 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
3030
struct platform_device *pdev = to_platform_device(dev);
3131
struct device_node *node = dev->of_node;
3232
struct resource *regs;
33-
int err;
33+
int err, i;
3434

3535
if (rockchip->is_rc) {
3636
regs = platform_get_resource_byname(pdev,
@@ -69,55 +69,23 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
6969
if (rockchip->link_gen < 0 || rockchip->link_gen > 2)
7070
rockchip->link_gen = 2;
7171

72-
rockchip->core_rst = devm_reset_control_get_exclusive(dev, "core");
73-
if (IS_ERR(rockchip->core_rst)) {
74-
if (PTR_ERR(rockchip->core_rst) != -EPROBE_DEFER)
75-
dev_err(dev, "missing core reset property in node\n");
76-
return PTR_ERR(rockchip->core_rst);
77-
}
78-
79-
rockchip->mgmt_rst = devm_reset_control_get_exclusive(dev, "mgmt");
80-
if (IS_ERR(rockchip->mgmt_rst)) {
81-
if (PTR_ERR(rockchip->mgmt_rst) != -EPROBE_DEFER)
82-
dev_err(dev, "missing mgmt reset property in node\n");
83-
return PTR_ERR(rockchip->mgmt_rst);
84-
}
85-
86-
rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev,
87-
"mgmt-sticky");
88-
if (IS_ERR(rockchip->mgmt_sticky_rst)) {
89-
if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER)
90-
dev_err(dev, "missing mgmt-sticky reset property in node\n");
91-
return PTR_ERR(rockchip->mgmt_sticky_rst);
92-
}
72+
for (i = 0; i < ROCKCHIP_NUM_PM_RSTS; i++)
73+
rockchip->pm_rsts[i].id = rockchip_pci_pm_rsts[i];
9374

94-
rockchip->pipe_rst = devm_reset_control_get_exclusive(dev, "pipe");
95-
if (IS_ERR(rockchip->pipe_rst)) {
96-
if (PTR_ERR(rockchip->pipe_rst) != -EPROBE_DEFER)
97-
dev_err(dev, "missing pipe reset property in node\n");
98-
return PTR_ERR(rockchip->pipe_rst);
99-
}
100-
101-
rockchip->pm_rst = devm_reset_control_get_exclusive(dev, "pm");
102-
if (IS_ERR(rockchip->pm_rst)) {
103-
if (PTR_ERR(rockchip->pm_rst) != -EPROBE_DEFER)
104-
dev_err(dev, "missing pm reset property in node\n");
105-
return PTR_ERR(rockchip->pm_rst);
106-
}
75+
err = devm_reset_control_bulk_get_exclusive(dev,
76+
ROCKCHIP_NUM_PM_RSTS,
77+
rockchip->pm_rsts);
78+
if (err)
79+
return dev_err_probe(dev, err, "Cannot get the PM reset\n");
10780

108-
rockchip->pclk_rst = devm_reset_control_get_exclusive(dev, "pclk");
109-
if (IS_ERR(rockchip->pclk_rst)) {
110-
if (PTR_ERR(rockchip->pclk_rst) != -EPROBE_DEFER)
111-
dev_err(dev, "missing pclk reset property in node\n");
112-
return PTR_ERR(rockchip->pclk_rst);
113-
}
81+
for (i = 0; i < ROCKCHIP_NUM_CORE_RSTS; i++)
82+
rockchip->core_rsts[i].id = rockchip_pci_core_rsts[i];
11483

115-
rockchip->aclk_rst = devm_reset_control_get_exclusive(dev, "aclk");
116-
if (IS_ERR(rockchip->aclk_rst)) {
117-
if (PTR_ERR(rockchip->aclk_rst) != -EPROBE_DEFER)
118-
dev_err(dev, "missing aclk reset property in node\n");
119-
return PTR_ERR(rockchip->aclk_rst);
120-
}
84+
err = devm_reset_control_bulk_get_exclusive(dev,
85+
ROCKCHIP_NUM_CORE_RSTS,
86+
rockchip->core_rsts);
87+
if (err)
88+
return dev_err_probe(dev, err, "Cannot get the Core resets\n");
12189

12290
if (rockchip->is_rc)
12391
rockchip->perst_gpio = devm_gpiod_get_optional(dev, "ep",
@@ -150,23 +118,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
150118
int err, i;
151119
u32 regs;
152120

153-
err = reset_control_assert(rockchip->aclk_rst);
154-
if (err) {
155-
dev_err(dev, "assert aclk_rst err %d\n", err);
156-
return err;
157-
}
158-
159-
err = reset_control_assert(rockchip->pclk_rst);
160-
if (err) {
161-
dev_err(dev, "assert pclk_rst err %d\n", err);
162-
return err;
163-
}
164-
165-
err = reset_control_assert(rockchip->pm_rst);
166-
if (err) {
167-
dev_err(dev, "assert pm_rst err %d\n", err);
168-
return err;
169-
}
121+
err = reset_control_bulk_assert(ROCKCHIP_NUM_PM_RSTS,
122+
rockchip->pm_rsts);
123+
if (err)
124+
return dev_err_probe(dev, err, "Couldn't assert PM resets\n");
170125

171126
for (i = 0; i < MAX_LANE_NUM; i++) {
172127
err = phy_init(rockchip->phys[i]);
@@ -176,47 +131,19 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
176131
}
177132
}
178133

179-
err = reset_control_assert(rockchip->core_rst);
180-
if (err) {
181-
dev_err(dev, "assert core_rst err %d\n", err);
182-
goto err_exit_phy;
183-
}
184-
185-
err = reset_control_assert(rockchip->mgmt_rst);
186-
if (err) {
187-
dev_err(dev, "assert mgmt_rst err %d\n", err);
188-
goto err_exit_phy;
189-
}
190-
191-
err = reset_control_assert(rockchip->mgmt_sticky_rst);
134+
err = reset_control_bulk_assert(ROCKCHIP_NUM_CORE_RSTS,
135+
rockchip->core_rsts);
192136
if (err) {
193-
dev_err(dev, "assert mgmt_sticky_rst err %d\n", err);
194-
goto err_exit_phy;
195-
}
196-
197-
err = reset_control_assert(rockchip->pipe_rst);
198-
if (err) {
199-
dev_err(dev, "assert pipe_rst err %d\n", err);
137+
dev_err_probe(dev, err, "Couldn't assert Core resets\n");
200138
goto err_exit_phy;
201139
}
202140

203141
udelay(10);
204142

205-
err = reset_control_deassert(rockchip->pm_rst);
143+
err = reset_control_bulk_deassert(ROCKCHIP_NUM_PM_RSTS,
144+
rockchip->pm_rsts);
206145
if (err) {
207-
dev_err(dev, "deassert pm_rst err %d\n", err);
208-
goto err_exit_phy;
209-
}
210-
211-
err = reset_control_deassert(rockchip->aclk_rst);
212-
if (err) {
213-
dev_err(dev, "deassert aclk_rst err %d\n", err);
214-
goto err_exit_phy;
215-
}
216-
217-
err = reset_control_deassert(rockchip->pclk_rst);
218-
if (err) {
219-
dev_err(dev, "deassert pclk_rst err %d\n", err);
146+
dev_err(dev, "Couldn't deassert PM resets %d\n", err);
220147
goto err_exit_phy;
221148
}
222149

@@ -256,31 +183,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
256183
goto err_power_off_phy;
257184
}
258185

259-
/*
260-
* Please don't reorder the deassert sequence of the following
261-
* four reset pins.
262-
*/
263-
err = reset_control_deassert(rockchip->mgmt_sticky_rst);
264-
if (err) {
265-
dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err);
266-
goto err_power_off_phy;
267-
}
268-
269-
err = reset_control_deassert(rockchip->core_rst);
270-
if (err) {
271-
dev_err(dev, "deassert core_rst err %d\n", err);
272-
goto err_power_off_phy;
273-
}
274-
275-
err = reset_control_deassert(rockchip->mgmt_rst);
276-
if (err) {
277-
dev_err(dev, "deassert mgmt_rst err %d\n", err);
278-
goto err_power_off_phy;
279-
}
280-
281-
err = reset_control_deassert(rockchip->pipe_rst);
186+
err = reset_control_bulk_deassert(ROCKCHIP_NUM_CORE_RSTS,
187+
rockchip->core_rsts);
282188
if (err) {
283-
dev_err(dev, "deassert pipe_rst err %d\n", err);
189+
dev_err(dev, "Couldn't deassert Core reset %d\n", err);
284190
goto err_power_off_phy;
285191
}
286192

‎drivers/pci/controller/pcie-rockchip.h

Lines changed: 19 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515
#include <linux/kernel.h>
1616
#include <linux/pci.h>
1717
#include <linux/pci-ecam.h>
18+
#include <linux/reset.h>
1819

1920
/*
2021
* The upper 16 bits of PCIE_CLIENT_CONFIG are a write mask for the lower 16
@@ -310,18 +311,29 @@
310311
(((c) << ((b) * 8 + 5)) & \
311312
ROCKCHIP_PCIE_CORE_EP_FUNC_BAR_CFG_BAR_CTRL_MASK(b))
312313

314+
#define ROCKCHIP_NUM_PM_RSTS ARRAY_SIZE(rockchip_pci_pm_rsts)
315+
#define ROCKCHIP_NUM_CORE_RSTS ARRAY_SIZE(rockchip_pci_core_rsts)
316+
317+
static const char * const rockchip_pci_pm_rsts[] = {
318+
"pm",
319+
"pclk",
320+
"aclk",
321+
};
322+
323+
static const char * const rockchip_pci_core_rsts[] = {
324+
"mgmt-sticky",
325+
"core",
326+
"mgmt",
327+
"pipe",
328+
};
329+
313330
struct rockchip_pcie {
314331
void __iomem *reg_base; /* DT axi-base */
315332
void __iomem *apb_base; /* DT apb-base */
316333
bool legacy_phy;
317334
struct phy *phys[MAX_LANE_NUM];
318-
struct reset_control *core_rst;
319-
struct reset_control *mgmt_rst;
320-
struct reset_control *mgmt_sticky_rst;
321-
struct reset_control *pipe_rst;
322-
struct reset_control *pm_rst;
323-
struct reset_control *aclk_rst;
324-
struct reset_control *pclk_rst;
335+
struct reset_control_bulk_data pm_rsts[ROCKCHIP_NUM_PM_RSTS];
336+
struct reset_control_bulk_data core_rsts[ROCKCHIP_NUM_CORE_RSTS];
325337
struct clk_bulk_data *clks;
326338
int num_clks;
327339
struct regulator *vpcie12v; /* 12V power supply */

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