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zhang-ruirafaeljw
zhang-rui
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rafaeljw
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powercap: intel_rapl: Fix a sparse warning in TPMI interface
Depends on the interface used, the RAPL registers can be either MSR indexes or memory mapped IO addresses. Current RAPL common code uses u64 to save both MSR and memory mapped IO registers. With this, when handling register address with an __iomem annotation, it triggers a sparse warning like below: sparse warnings: (new ones prefixed by >>) >> drivers/powercap/intel_rapl_tpmi.c:141:41: sparse: sparse: incorrect type in initializer (different address spaces) @@ expected unsigned long long [usertype] *tpmi_rapl_regs @@ got void [noderef] __iomem * @@ drivers/powercap/intel_rapl_tpmi.c:141:41: sparse: expected unsigned long long [usertype] *tpmi_rapl_regs drivers/powercap/intel_rapl_tpmi.c:141:41: sparse: got void [noderef] __iomem * Fix the problem by using a union to save the registers instead. Suggested-by: David Laight <David.Laight@ACULAB.COM> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202307031405.dy3druuy-lkp@intel.com/ Tested-by: Wang Wendy <wendy.wang@intel.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com> [ rjw: Subject and changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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‎drivers/powercap/intel_rapl_common.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -818,7 +818,7 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
818818
return -EINVAL;
819819

820820
ra.reg = rd->regs[rpi->id];
821-
if (!ra.reg)
821+
if (!ra.reg.val)
822822
return -EINVAL;
823823

824824
/* non-hardware data are collected by the polling thread */
@@ -830,7 +830,7 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
830830
ra.mask = rpi->mask;
831831

832832
if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {
833-
pr_debug("failed to read reg 0x%llx for %s:%s\n", ra.reg, rd->rp->name, rd->name);
833+
pr_debug("failed to read reg 0x%llx for %s:%s\n", ra.reg.val, rd->rp->name, rd->name);
834834
return -EIO;
835835
}
836836

@@ -920,7 +920,7 @@ static int rapl_check_unit_core(struct rapl_domain *rd)
920920
ra.mask = ~0;
921921
if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {
922922
pr_err("Failed to read power unit REG 0x%llx on %s:%s, exit.\n",
923-
ra.reg, rd->rp->name, rd->name);
923+
ra.reg.val, rd->rp->name, rd->name);
924924
return -ENODEV;
925925
}
926926

@@ -948,7 +948,7 @@ static int rapl_check_unit_atom(struct rapl_domain *rd)
948948
ra.mask = ~0;
949949
if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {
950950
pr_err("Failed to read power unit REG 0x%llx on %s:%s, exit.\n",
951-
ra.reg, rd->rp->name, rd->name);
951+
ra.reg.val, rd->rp->name, rd->name);
952952
return -ENODEV;
953953
}
954954

@@ -1135,7 +1135,7 @@ static int rapl_check_unit_tpmi(struct rapl_domain *rd)
11351135
ra.mask = ~0;
11361136
if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {
11371137
pr_err("Failed to read power unit REG 0x%llx on %s:%s, exit.\n",
1138-
ra.reg, rd->rp->name, rd->name);
1138+
ra.reg.val, rd->rp->name, rd->name);
11391139
return -ENODEV;
11401140
}
11411141

@@ -1411,8 +1411,8 @@ static int rapl_get_domain_unit(struct rapl_domain *rd)
14111411
struct rapl_defaults *defaults = get_defaults(rd->rp);
14121412
int ret;
14131413

1414-
if (!rd->regs[RAPL_DOMAIN_REG_UNIT]) {
1415-
if (!rd->rp->priv->reg_unit) {
1414+
if (!rd->regs[RAPL_DOMAIN_REG_UNIT].val) {
1415+
if (!rd->rp->priv->reg_unit.val) {
14161416
pr_err("No valid Unit register found\n");
14171417
return -ENODEV;
14181418
}

‎drivers/powercap/intel_rapl_msr.c

Lines changed: 25 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -34,28 +34,32 @@ static struct rapl_if_priv *rapl_msr_priv;
3434

3535
static struct rapl_if_priv rapl_msr_priv_intel = {
3636
.type = RAPL_IF_MSR,
37-
.reg_unit = MSR_RAPL_POWER_UNIT,
38-
.regs[RAPL_DOMAIN_PACKAGE] = {
39-
MSR_PKG_POWER_LIMIT, MSR_PKG_ENERGY_STATUS, MSR_PKG_PERF_STATUS, 0, MSR_PKG_POWER_INFO },
40-
.regs[RAPL_DOMAIN_PP0] = {
41-
MSR_PP0_POWER_LIMIT, MSR_PP0_ENERGY_STATUS, 0, MSR_PP0_POLICY, 0 },
42-
.regs[RAPL_DOMAIN_PP1] = {
43-
MSR_PP1_POWER_LIMIT, MSR_PP1_ENERGY_STATUS, 0, MSR_PP1_POLICY, 0 },
44-
.regs[RAPL_DOMAIN_DRAM] = {
45-
MSR_DRAM_POWER_LIMIT, MSR_DRAM_ENERGY_STATUS, MSR_DRAM_PERF_STATUS, 0, MSR_DRAM_POWER_INFO },
46-
.regs[RAPL_DOMAIN_PLATFORM] = {
47-
MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS, 0, 0, 0},
37+
.reg_unit.msr = MSR_RAPL_POWER_UNIT,
38+
.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PKG_POWER_LIMIT,
39+
.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_STATUS].msr = MSR_PKG_ENERGY_STATUS,
40+
.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PERF].msr = MSR_PKG_PERF_STATUS,
41+
.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_INFO].msr = MSR_PKG_POWER_INFO,
42+
.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PP0_POWER_LIMIT,
43+
.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_STATUS].msr = MSR_PP0_ENERGY_STATUS,
44+
.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_POLICY].msr = MSR_PP0_POLICY,
45+
.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PP1_POWER_LIMIT,
46+
.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_STATUS].msr = MSR_PP1_ENERGY_STATUS,
47+
.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_POLICY].msr = MSR_PP1_POLICY,
48+
.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_LIMIT].msr = MSR_DRAM_POWER_LIMIT,
49+
.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_STATUS].msr = MSR_DRAM_ENERGY_STATUS,
50+
.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_PERF].msr = MSR_DRAM_PERF_STATUS,
51+
.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_INFO].msr = MSR_DRAM_POWER_INFO,
52+
.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PLATFORM_POWER_LIMIT,
53+
.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS].msr = MSR_PLATFORM_ENERGY_STATUS,
4854
.limits[RAPL_DOMAIN_PACKAGE] = BIT(POWER_LIMIT2),
4955
.limits[RAPL_DOMAIN_PLATFORM] = BIT(POWER_LIMIT2),
5056
};
5157

5258
static struct rapl_if_priv rapl_msr_priv_amd = {
5359
.type = RAPL_IF_MSR,
54-
.reg_unit = MSR_AMD_RAPL_POWER_UNIT,
55-
.regs[RAPL_DOMAIN_PACKAGE] = {
56-
0, MSR_AMD_PKG_ENERGY_STATUS, 0, 0, 0 },
57-
.regs[RAPL_DOMAIN_PP0] = {
58-
0, MSR_AMD_CORE_ENERGY_STATUS, 0, 0, 0 },
60+
.reg_unit.msr = MSR_AMD_RAPL_POWER_UNIT,
61+
.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_STATUS].msr = MSR_AMD_PKG_ENERGY_STATUS,
62+
.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_STATUS].msr = MSR_AMD_CORE_ENERGY_STATUS,
5963
};
6064

6165
/* Handles CPU hotplug on multi-socket systems.
@@ -99,10 +103,8 @@ static int rapl_cpu_down_prep(unsigned int cpu)
99103

100104
static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
101105
{
102-
u32 msr = (u32)ra->reg;
103-
104-
if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) {
105-
pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
106+
if (rdmsrl_safe_on_cpu(cpu, ra->reg.msr, &ra->value)) {
107+
pr_debug("failed to read msr 0x%x on cpu %d\n", ra->reg.msr, cpu);
106108
return -EIO;
107109
}
108110
ra->value &= ra->mask;
@@ -112,17 +114,16 @@ static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
112114
static void rapl_msr_update_func(void *info)
113115
{
114116
struct reg_action *ra = info;
115-
u32 msr = (u32)ra->reg;
116117
u64 val;
117118

118-
ra->err = rdmsrl_safe(msr, &val);
119+
ra->err = rdmsrl_safe(ra->reg.msr, &val);
119120
if (ra->err)
120121
return;
121122

122123
val &= ~ra->mask;
123124
val |= ra->value;
124125

125-
ra->err = wrmsrl_safe(msr, val);
126+
ra->err = wrmsrl_safe(ra->reg.msr, val);
126127
}
127128

128129
static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
@@ -171,7 +172,7 @@ static int rapl_msr_probe(struct platform_device *pdev)
171172

172173
if (id) {
173174
rapl_msr_priv->limits[RAPL_DOMAIN_PACKAGE] |= BIT(POWER_LIMIT4);
174-
rapl_msr_priv->regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4] =
175+
rapl_msr_priv->regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4].msr =
175176
MSR_VR_CURRENT_CONFIG;
176177
pr_info("PL4 support detected.\n");
177178
}

‎drivers/powercap/intel_rapl_tpmi.c

Lines changed: 8 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -59,10 +59,10 @@ static struct powercap_control_type *tpmi_control_type;
5959

6060
static int tpmi_rapl_read_raw(int id, struct reg_action *ra)
6161
{
62-
if (!ra->reg)
62+
if (!ra->reg.mmio)
6363
return -EINVAL;
6464

65-
ra->value = readq((void __iomem *)ra->reg);
65+
ra->value = readq(ra->reg.mmio);
6666

6767
ra->value &= ra->mask;
6868
return 0;
@@ -72,15 +72,15 @@ static int tpmi_rapl_write_raw(int id, struct reg_action *ra)
7272
{
7373
u64 val;
7474

75-
if (!ra->reg)
75+
if (!ra->reg.mmio)
7676
return -EINVAL;
7777

78-
val = readq((void __iomem *)ra->reg);
78+
val = readq(ra->reg.mmio);
7979

8080
val &= ~ra->mask;
8181
val |= ra->value;
8282

83-
writeq(val, (void __iomem *)ra->reg);
83+
writeq(val, ra->reg.mmio);
8484
return 0;
8585
}
8686

@@ -138,8 +138,7 @@ static int parse_one_domain(struct tpmi_rapl_package *trp, u32 offset)
138138
enum tpmi_rapl_register reg_index;
139139
enum rapl_domain_reg_id reg_id;
140140
int tpmi_domain_size, tpmi_domain_flags;
141-
u64 *tpmi_rapl_regs = trp->base + offset;
142-
u64 tpmi_domain_header = readq((void __iomem *)tpmi_rapl_regs);
141+
u64 tpmi_domain_header = readq(trp->base + offset);
143142

144143
/* Domain Parent bits are ignored for now */
145144
tpmi_domain_version = tpmi_domain_header & 0xff;
@@ -180,7 +179,7 @@ static int parse_one_domain(struct tpmi_rapl_package *trp, u32 offset)
180179
return -EINVAL;
181180
}
182181

183-
if (trp->priv.regs[domain_type][RAPL_DOMAIN_REG_UNIT]) {
182+
if (trp->priv.regs[domain_type][RAPL_DOMAIN_REG_UNIT].mmio) {
184183
pr_warn(FW_BUG "Duplicate Domain type %d\n", tpmi_domain_type);
185184
return -EINVAL;
186185
}
@@ -218,7 +217,7 @@ static int parse_one_domain(struct tpmi_rapl_package *trp, u32 offset)
218217
default:
219218
continue;
220219
}
221-
trp->priv.regs[domain_type][reg_id] = (u64)&tpmi_rapl_regs[reg_index];
220+
trp->priv.regs[domain_type][reg_id].mmio = trp->base + offset + reg_index * 8;
222221
}
223222

224223
return 0;

‎drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -57,10 +57,10 @@ static int rapl_mmio_cpu_down_prep(unsigned int cpu)
5757

5858
static int rapl_mmio_read_raw(int cpu, struct reg_action *ra)
5959
{
60-
if (!ra->reg)
60+
if (!ra->reg.mmio)
6161
return -EINVAL;
6262

63-
ra->value = readq((void __iomem *)ra->reg);
63+
ra->value = readq(ra->reg.mmio);
6464
ra->value &= ra->mask;
6565
return 0;
6666
}
@@ -69,13 +69,13 @@ static int rapl_mmio_write_raw(int cpu, struct reg_action *ra)
6969
{
7070
u64 val;
7171

72-
if (!ra->reg)
72+
if (!ra->reg.mmio)
7373
return -EINVAL;
7474

75-
val = readq((void __iomem *)ra->reg);
75+
val = readq(ra->reg.mmio);
7676
val &= ~ra->mask;
7777
val |= ra->value;
78-
writeq(val, (void __iomem *)ra->reg);
78+
writeq(val, ra->reg.mmio);
7979
return 0;
8080
}
8181

@@ -92,13 +92,13 @@ int proc_thermal_rapl_add(struct pci_dev *pdev, struct proc_thermal_device *proc
9292
for (domain = RAPL_DOMAIN_PACKAGE; domain < RAPL_DOMAIN_MAX; domain++) {
9393
for (reg = RAPL_DOMAIN_REG_LIMIT; reg < RAPL_DOMAIN_REG_MAX; reg++)
9494
if (rapl_regs->regs[domain][reg])
95-
rapl_mmio_priv.regs[domain][reg] =
96-
(u64)proc_priv->mmio_base +
95+
rapl_mmio_priv.regs[domain][reg].mmio =
96+
proc_priv->mmio_base +
9797
rapl_regs->regs[domain][reg];
9898
rapl_mmio_priv.limits[domain] = rapl_regs->limits[domain];
9999
}
100100
rapl_mmio_priv.type = RAPL_IF_MMIO;
101-
rapl_mmio_priv.reg_unit = (u64)proc_priv->mmio_base + rapl_regs->reg_unit;
101+
rapl_mmio_priv.reg_unit.mmio = proc_priv->mmio_base + rapl_regs->reg_unit;
102102

103103
rapl_mmio_priv.read_raw = rapl_mmio_read_raw;
104104
rapl_mmio_priv.write_raw = rapl_mmio_write_raw;

‎include/linux/intel_rapl.h

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -100,10 +100,16 @@ struct rapl_package;
100100

101101
#define RAPL_DOMAIN_NAME_LENGTH 16
102102

103+
union rapl_reg {
104+
void __iomem *mmio;
105+
u32 msr;
106+
u64 val;
107+
};
108+
103109
struct rapl_domain {
104110
char name[RAPL_DOMAIN_NAME_LENGTH];
105111
enum rapl_domain_type id;
106-
u64 regs[RAPL_DOMAIN_REG_MAX];
112+
union rapl_reg regs[RAPL_DOMAIN_REG_MAX];
107113
struct powercap_zone power_zone;
108114
struct rapl_domain_data rdd;
109115
struct rapl_power_limit rpl[NR_POWER_LIMITS];
@@ -116,7 +122,7 @@ struct rapl_domain {
116122
};
117123

118124
struct reg_action {
119-
u64 reg;
125+
union rapl_reg reg;
120126
u64 mask;
121127
u64 value;
122128
int err;
@@ -143,8 +149,8 @@ struct rapl_if_priv {
143149
enum rapl_if_type type;
144150
struct powercap_control_type *control_type;
145151
enum cpuhp_state pcap_rapl_online;
146-
u64 reg_unit;
147-
u64 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
152+
union rapl_reg reg_unit;
153+
union rapl_reg regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
148154
int limits[RAPL_DOMAIN_MAX];
149155
int (*read_raw)(int id, struct reg_action *ra);
150156
int (*write_raw)(int id, struct reg_action *ra);

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