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Merge tag 'drm-xe-fixes-2024-02-01' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes
UAPI Changes: - Only allow a single user-fence per exec / bind. The reason for this clarification fix is a limitation in the implementation which can be lifted moving forward, if needed. Driver Changes: - A crash fix - A fix for an assert due to missing mem_acces ref - Only allow a single user-fence per exec / bind. - Some sparse warning fixes - Two fixes for compilation failures on various odd combinations of gcc / arch pointed out on LKML. - Fix a fragile partial allocation pointed out on LKML. Cross-driver Change: - A sysfs ABI documentation warning fix This also touches i915 and is acked by i915 maintainers. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZbuCYdMDVK-kAWC5@fedora
2 parents 419d8a9 + 5f16ee2 commit 111a3f0

19 files changed

+234
-167
lines changed

‎Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,12 @@
1-
What: /sys/devices/.../hwmon/hwmon<i>/in0_input
1+
What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/in0_input
22
Date: February 2023
33
KernelVersion: 6.2
44
Contact: intel-gfx@lists.freedesktop.org
55
Description: RO. Current Voltage in millivolt.
66

77
Only supported for particular Intel i915 graphics platforms.
88

9-
What: /sys/devices/.../hwmon/hwmon<i>/power1_max
9+
What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_max
1010
Date: February 2023
1111
KernelVersion: 6.2
1212
Contact: intel-gfx@lists.freedesktop.org
@@ -20,15 +20,15 @@ Description: RW. Card reactive sustained (PL1/Tau) power limit in microwatts.
2020

2121
Only supported for particular Intel i915 graphics platforms.
2222

23-
What: /sys/devices/.../hwmon/hwmon<i>/power1_rated_max
23+
What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_rated_max
2424
Date: February 2023
2525
KernelVersion: 6.2
2626
Contact: intel-gfx@lists.freedesktop.org
2727
Description: RO. Card default power limit (default TDP setting).
2828

2929
Only supported for particular Intel i915 graphics platforms.
3030

31-
What: /sys/devices/.../hwmon/hwmon<i>/power1_max_interval
31+
What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_max_interval
3232
Date: February 2023
3333
KernelVersion: 6.2
3434
Contact: intel-gfx@lists.freedesktop.org
@@ -37,7 +37,7 @@ Description: RW. Sustained power limit interval (Tau in PL1/Tau) in
3737

3838
Only supported for particular Intel i915 graphics platforms.
3939

40-
What: /sys/devices/.../hwmon/hwmon<i>/power1_crit
40+
What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/power1_crit
4141
Date: February 2023
4242
KernelVersion: 6.2
4343
Contact: intel-gfx@lists.freedesktop.org
@@ -50,7 +50,7 @@ Description: RW. Card reactive critical (I1) power limit in microwatts.
5050

5151
Only supported for particular Intel i915 graphics platforms.
5252

53-
What: /sys/devices/.../hwmon/hwmon<i>/curr1_crit
53+
What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/curr1_crit
5454
Date: February 2023
5555
KernelVersion: 6.2
5656
Contact: intel-gfx@lists.freedesktop.org
@@ -63,7 +63,7 @@ Description: RW. Card reactive critical (I1) power limit in milliamperes.
6363

6464
Only supported for particular Intel i915 graphics platforms.
6565

66-
What: /sys/devices/.../hwmon/hwmon<i>/energy1_input
66+
What: /sys/bus/pci/drivers/i915/.../hwmon/hwmon<i>/energy1_input
6767
Date: February 2023
6868
KernelVersion: 6.2
6969
Contact: intel-gfx@lists.freedesktop.org

‎Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
What: /sys/devices/.../hwmon/hwmon<i>/power1_max
1+
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max
22
Date: September 2023
33
KernelVersion: 6.5
44
Contact: intel-xe@lists.freedesktop.org
@@ -12,15 +12,15 @@ Description: RW. Card reactive sustained (PL1) power limit in microwatts.
1212

1313
Only supported for particular Intel xe graphics platforms.
1414

15-
What: /sys/devices/.../hwmon/hwmon<i>/power1_rated_max
15+
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_rated_max
1616
Date: September 2023
1717
KernelVersion: 6.5
1818
Contact: intel-xe@lists.freedesktop.org
1919
Description: RO. Card default power limit (default TDP setting).
2020

2121
Only supported for particular Intel xe graphics platforms.
2222

23-
What: /sys/devices/.../hwmon/hwmon<i>/power1_crit
23+
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_crit
2424
Date: September 2023
2525
KernelVersion: 6.5
2626
Contact: intel-xe@lists.freedesktop.org
@@ -33,7 +33,7 @@ Description: RW. Card reactive critical (I1) power limit in microwatts.
3333

3434
Only supported for particular Intel xe graphics platforms.
3535

36-
What: /sys/devices/.../hwmon/hwmon<i>/curr1_crit
36+
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr1_crit
3737
Date: September 2023
3838
KernelVersion: 6.5
3939
Contact: intel-xe@lists.freedesktop.org
@@ -44,23 +44,23 @@ Description: RW. Card reactive critical (I1) power limit in milliamperes.
4444
the operating frequency if the power averaged over a window
4545
exceeds this limit.
4646

47-
What: /sys/devices/.../hwmon/hwmon<i>/in0_input
47+
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/in0_input
4848
Date: September 2023
4949
KernelVersion: 6.5
5050
Contact: intel-xe@lists.freedesktop.org
5151
Description: RO. Current Voltage in millivolt.
5252

5353
Only supported for particular Intel xe graphics platforms.
5454

55-
What: /sys/devices/.../hwmon/hwmon<i>/energy1_input
55+
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/energy1_input
5656
Date: September 2023
5757
KernelVersion: 6.5
5858
Contact: intel-xe@lists.freedesktop.org
5959
Description: RO. Energy input of device in microjoules.
6060

6161
Only supported for particular Intel xe graphics platforms.
6262

63-
What: /sys/devices/.../hwmon/hwmon<i>/power1_max_interval
63+
What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_max_interval
6464
Date: October 2023
6565
KernelVersion: 6.6
6666
Contact: intel-xe@lists.freedesktop.org

‎drivers/gpu/drm/xe/abi/guc_actions_abi.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -50,8 +50,8 @@
5050

5151
#define HOST2GUC_SELF_CFG_REQUEST_MSG_LEN (GUC_HXG_REQUEST_MSG_MIN_LEN + 3u)
5252
#define HOST2GUC_SELF_CFG_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0
53-
#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_KEY (0xffff << 16)
54-
#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_LEN (0xffff << 0)
53+
#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_KEY (0xffffu << 16)
54+
#define HOST2GUC_SELF_CFG_REQUEST_MSG_1_KLV_LEN (0xffffu << 0)
5555
#define HOST2GUC_SELF_CFG_REQUEST_MSG_2_VALUE32 GUC_HXG_REQUEST_MSG_n_DATAn
5656
#define HOST2GUC_SELF_CFG_REQUEST_MSG_3_VALUE64 GUC_HXG_REQUEST_MSG_n_DATAn
5757

‎drivers/gpu/drm/xe/abi/guc_actions_slpc_abi.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -242,8 +242,8 @@ struct slpc_shared_data {
242242
(HOST2GUC_PC_SLPC_REQUEST_REQUEST_MSG_MIN_LEN + \
243243
HOST2GUC_PC_SLPC_EVENT_MAX_INPUT_ARGS)
244244
#define HOST2GUC_PC_SLPC_REQUEST_MSG_0_MBZ GUC_HXG_REQUEST_MSG_0_DATA0
245-
#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ID (0xff << 8)
246-
#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ARGC (0xff << 0)
245+
#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ID (0xffu << 8)
246+
#define HOST2GUC_PC_SLPC_REQUEST_MSG_1_EVENT_ARGC (0xffu << 0)
247247
#define HOST2GUC_PC_SLPC_REQUEST_MSG_N_EVENT_DATA_N GUC_HXG_REQUEST_MSG_n_DATAn
248248

249249
#endif

‎drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -82,11 +82,11 @@ static_assert(sizeof(struct guc_ct_buffer_desc) == 64);
8282
#define GUC_CTB_HDR_LEN 1u
8383
#define GUC_CTB_MSG_MIN_LEN GUC_CTB_HDR_LEN
8484
#define GUC_CTB_MSG_MAX_LEN 256u
85-
#define GUC_CTB_MSG_0_FENCE (0xffff << 16)
86-
#define GUC_CTB_MSG_0_FORMAT (0xf << 12)
85+
#define GUC_CTB_MSG_0_FENCE (0xffffu << 16)
86+
#define GUC_CTB_MSG_0_FORMAT (0xfu << 12)
8787
#define GUC_CTB_FORMAT_HXG 0u
88-
#define GUC_CTB_MSG_0_RESERVED (0xf << 8)
89-
#define GUC_CTB_MSG_0_NUM_DWORDS (0xff << 0)
88+
#define GUC_CTB_MSG_0_RESERVED (0xfu << 8)
89+
#define GUC_CTB_MSG_0_NUM_DWORDS (0xffu << 0)
9090

9191
/**
9292
* DOC: CTB HXG Message

‎drivers/gpu/drm/xe/abi/guc_klvs_abi.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -31,9 +31,9 @@
3131
*/
3232

3333
#define GUC_KLV_LEN_MIN 1u
34-
#define GUC_KLV_0_KEY (0xffff << 16)
35-
#define GUC_KLV_0_LEN (0xffff << 0)
36-
#define GUC_KLV_n_VALUE (0xffffffff << 0)
34+
#define GUC_KLV_0_KEY (0xffffu << 16)
35+
#define GUC_KLV_0_LEN (0xffffu << 0)
36+
#define GUC_KLV_n_VALUE (0xffffffffu << 0)
3737

3838
/**
3939
* DOC: GuC Self Config KLVs

‎drivers/gpu/drm/xe/abi/guc_messages_abi.h

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -40,18 +40,18 @@
4040
*/
4141

4242
#define GUC_HXG_MSG_MIN_LEN 1u
43-
#define GUC_HXG_MSG_0_ORIGIN (0x1 << 31)
43+
#define GUC_HXG_MSG_0_ORIGIN (0x1u << 31)
4444
#define GUC_HXG_ORIGIN_HOST 0u
4545
#define GUC_HXG_ORIGIN_GUC 1u
46-
#define GUC_HXG_MSG_0_TYPE (0x7 << 28)
46+
#define GUC_HXG_MSG_0_TYPE (0x7u << 28)
4747
#define GUC_HXG_TYPE_REQUEST 0u
4848
#define GUC_HXG_TYPE_EVENT 1u
4949
#define GUC_HXG_TYPE_NO_RESPONSE_BUSY 3u
5050
#define GUC_HXG_TYPE_NO_RESPONSE_RETRY 5u
5151
#define GUC_HXG_TYPE_RESPONSE_FAILURE 6u
5252
#define GUC_HXG_TYPE_RESPONSE_SUCCESS 7u
53-
#define GUC_HXG_MSG_0_AUX (0xfffffff << 0)
54-
#define GUC_HXG_MSG_n_PAYLOAD (0xffffffff << 0)
53+
#define GUC_HXG_MSG_0_AUX (0xfffffffu << 0)
54+
#define GUC_HXG_MSG_n_PAYLOAD (0xffffffffu << 0)
5555

5656
/**
5757
* DOC: HXG Request
@@ -85,8 +85,8 @@
8585
*/
8686

8787
#define GUC_HXG_REQUEST_MSG_MIN_LEN GUC_HXG_MSG_MIN_LEN
88-
#define GUC_HXG_REQUEST_MSG_0_DATA0 (0xfff << 16)
89-
#define GUC_HXG_REQUEST_MSG_0_ACTION (0xffff << 0)
88+
#define GUC_HXG_REQUEST_MSG_0_DATA0 (0xfffu << 16)
89+
#define GUC_HXG_REQUEST_MSG_0_ACTION (0xffffu << 0)
9090
#define GUC_HXG_REQUEST_MSG_n_DATAn GUC_HXG_MSG_n_PAYLOAD
9191

9292
/**
@@ -117,8 +117,8 @@
117117
*/
118118

119119
#define GUC_HXG_EVENT_MSG_MIN_LEN GUC_HXG_MSG_MIN_LEN
120-
#define GUC_HXG_EVENT_MSG_0_DATA0 (0xfff << 16)
121-
#define GUC_HXG_EVENT_MSG_0_ACTION (0xffff << 0)
120+
#define GUC_HXG_EVENT_MSG_0_DATA0 (0xfffu << 16)
121+
#define GUC_HXG_EVENT_MSG_0_ACTION (0xffffu << 0)
122122
#define GUC_HXG_EVENT_MSG_n_DATAn GUC_HXG_MSG_n_PAYLOAD
123123

124124
/**
@@ -188,8 +188,8 @@
188188
*/
189189

190190
#define GUC_HXG_FAILURE_MSG_LEN GUC_HXG_MSG_MIN_LEN
191-
#define GUC_HXG_FAILURE_MSG_0_HINT (0xfff << 16)
192-
#define GUC_HXG_FAILURE_MSG_0_ERROR (0xffff << 0)
191+
#define GUC_HXG_FAILURE_MSG_0_HINT (0xfffu << 16)
192+
#define GUC_HXG_FAILURE_MSG_0_ERROR (0xffffu << 0)
193193

194194
/**
195195
* DOC: HXG Response

‎drivers/gpu/drm/xe/xe_exec.c

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -111,7 +111,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
111111
u64 addresses[XE_HW_ENGINE_MAX_INSTANCE];
112112
struct drm_gpuvm_exec vm_exec = {.extra.fn = xe_exec_fn};
113113
struct drm_exec *exec = &vm_exec.exec;
114-
u32 i, num_syncs = 0;
114+
u32 i, num_syncs = 0, num_ufence = 0;
115115
struct xe_sched_job *job;
116116
struct dma_fence *rebind_fence;
117117
struct xe_vm *vm;
@@ -157,6 +157,14 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
157157
SYNC_PARSE_FLAG_LR_MODE : 0));
158158
if (err)
159159
goto err_syncs;
160+
161+
if (xe_sync_is_ufence(&syncs[i]))
162+
num_ufence++;
163+
}
164+
165+
if (XE_IOCTL_DBG(xe, num_ufence > 1)) {
166+
err = -EINVAL;
167+
goto err_syncs;
160168
}
161169

162170
if (xe_exec_queue_is_parallel(q)) {

‎drivers/gpu/drm/xe/xe_gt_mcr.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -480,7 +480,7 @@ static bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,
480480
* to synchronize with external clients (e.g., firmware), so a semaphore
481481
* register will also need to be taken.
482482
*/
483-
static void mcr_lock(struct xe_gt *gt)
483+
static void mcr_lock(struct xe_gt *gt) __acquires(&gt->mcr_lock)
484484
{
485485
struct xe_device *xe = gt_to_xe(gt);
486486
int ret = 0;
@@ -500,7 +500,7 @@ static void mcr_lock(struct xe_gt *gt)
500500
drm_WARN_ON_ONCE(&xe->drm, ret == -ETIMEDOUT);
501501
}
502502

503-
static void mcr_unlock(struct xe_gt *gt)
503+
static void mcr_unlock(struct xe_gt *gt) __releases(&gt->mcr_lock)
504504
{
505505
/* Release hardware semaphore - this is done by writing 1 to the register */
506506
if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270)

‎drivers/gpu/drm/xe/xe_gt_pagefault.c

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -165,7 +165,8 @@ static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf)
165165
goto unlock_vm;
166166
}
167167

168-
if (!xe_vma_is_userptr(vma) || !xe_vma_userptr_check_repin(vma)) {
168+
if (!xe_vma_is_userptr(vma) ||
169+
!xe_vma_userptr_check_repin(to_userptr_vma(vma))) {
169170
downgrade_write(&vm->lock);
170171
write_locked = false;
171172
}
@@ -181,11 +182,13 @@ static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf)
181182
/* TODO: Validate fault */
182183

183184
if (xe_vma_is_userptr(vma) && write_locked) {
185+
struct xe_userptr_vma *uvma = to_userptr_vma(vma);
186+
184187
spin_lock(&vm->userptr.invalidated_lock);
185-
list_del_init(&vma->userptr.invalidate_link);
188+
list_del_init(&uvma->userptr.invalidate_link);
186189
spin_unlock(&vm->userptr.invalidated_lock);
187190

188-
ret = xe_vma_userptr_pin_pages(vma);
191+
ret = xe_vma_userptr_pin_pages(uvma);
189192
if (ret)
190193
goto unlock_vm;
191194

@@ -220,7 +223,7 @@ static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf)
220223
dma_fence_put(fence);
221224

222225
if (xe_vma_is_userptr(vma))
223-
ret = xe_vma_userptr_check_repin(vma);
226+
ret = xe_vma_userptr_check_repin(to_userptr_vma(vma));
224227
vma->usm.tile_invalidated &= ~BIT(tile->id);
225228

226229
unlock_dma_resv:

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