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Nikita Zhandarovichjlahtine-intel
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drm/i915/dp: prevent potential div-by-zero
drm_dp_dsc_sink_max_slice_count() may return 0 if something goes wrong on the part of the DSC sink and its DPCD register. This null value may be later used as a divisor in intel_dsc_compute_params(), which will lead to an error. In the unlikely event that this issue occurs, fix it by testing the return value of drm_dp_dsc_sink_max_slice_count() against zero. Found by Linux Verification Center (linuxtesting.org) with static analysis tool SVACE. Fixes: a4a1577 ("drm/i915/dp: Compute DSC pipe config in atomic check") Signed-off-by: Nikita Zhandarovich <n.zhandarovich@fintech.ru> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230418140430.69902-1-n.zhandarovich@fintech.ru (cherry picked from commit 51f7008) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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drivers/gpu/drm/i915/display/intel_dp.c

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@@ -1601,6 +1601,11 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
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pipe_config->dsc.slice_count =
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drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd,
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true);
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if (!pipe_config->dsc.slice_count) {
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drm_dbg_kms(&dev_priv->drm, "Unsupported Slice Count %d\n",
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pipe_config->dsc.slice_count);
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return -EINVAL;
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}
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} else {
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u16 dsc_max_output_bpp = 0;
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u8 dsc_dp_slice_count;

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