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pinctrl: amd: Only use special debounce behavior for GPIO 0
It's uncommon to use debounce on any other pin, but technically we should only set debounce to 0 when working off GPIO0. Cc: stable@vger.kernel.org Tested-by: Jan Visser <starquake@linuxeverywhere.org> Fixes: 968ab92 ("pinctrl: amd: Detect internal GPIO0 debounce handling") Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20230705133005.577-2-mario.limonciello@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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drivers/pinctrl/pinctrl-amd.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -128,9 +128,11 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
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raw_spin_lock_irqsave(&gpio_dev->lock, flags);
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/* Use special handling for Pin0 debounce */
131-
pin_reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG);
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if (pin_reg & INTERNAL_GPIO0_DEBOUNCE)
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debounce = 0;
131+
if (offset == 0) {
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pin_reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG);
133+
if (pin_reg & INTERNAL_GPIO0_DEBOUNCE)
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debounce = 0;
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}
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pin_reg = readl(gpio_dev->base + offset * 4);
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