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dt-bindings: PCI: microchip,pcie-host: Allow dma-noncoherent
PolarFire SoC may be configured in a way that requires non-coherent DMA handling. On RISC-V, buses are coherent by default & the dma-noncoherent property is required to denote buses or devices that are non-coherent. Link: https://lore.kernel.org/r/20241011140043.1250030-4-daire.mcnamara@microchip.com Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org>
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Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml

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pattern: '^fic[0-3]$'
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dma-coherent: true
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minItems: 1
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