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Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King: - fix unwinder for uleb128 case - fix kernel-doc warnings for HP Jornada 7xx - fix unbalanced stack on vfp success path * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 9297/1: vfp: avoid unbalanced stack on 'success' return path ARM: 9296/1: HP Jornada 7XX: fix kernel-doc warnings ARM: 9295/1: unwind:fix unwind abort for uleb128 case
2 parents 31f4104 + 2b951b0 commit 01bc932

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lines changed

4 files changed

+37
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lines changed

arch/arm/kernel/unwind.c

Lines changed: 24 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -308,6 +308,29 @@ static int unwind_exec_pop_subset_r0_to_r3(struct unwind_ctrl_block *ctrl,
308308
return URC_OK;
309309
}
310310

311+
static unsigned long unwind_decode_uleb128(struct unwind_ctrl_block *ctrl)
312+
{
313+
unsigned long bytes = 0;
314+
unsigned long insn;
315+
unsigned long result = 0;
316+
317+
/*
318+
* unwind_get_byte() will advance `ctrl` one instruction at a time, so
319+
* loop until we get an instruction byte where bit 7 is not set.
320+
*
321+
* Note: This decodes a maximum of 4 bytes to output 28 bits data where
322+
* max is 0xfffffff: that will cover a vsp increment of 1073742336, hence
323+
* it is sufficient for unwinding the stack.
324+
*/
325+
do {
326+
insn = unwind_get_byte(ctrl);
327+
result |= (insn & 0x7f) << (bytes * 7);
328+
bytes++;
329+
} while (!!(insn & 0x80) && (bytes != sizeof(result)));
330+
331+
return result;
332+
}
333+
311334
/*
312335
* Execute the current unwind instruction.
313336
*/
@@ -361,7 +384,7 @@ static int unwind_exec_insn(struct unwind_ctrl_block *ctrl)
361384
if (ret)
362385
goto error;
363386
} else if (insn == 0xb2) {
364-
unsigned long uleb128 = unwind_get_byte(ctrl);
387+
unsigned long uleb128 = unwind_decode_uleb128(ctrl);
365388

366389
ctrl->vrs[SP] += 0x204 + (uleb128 << 2);
367390
} else {

arch/arm/mach-sa1100/jornada720_ssp.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
// SPDX-License-Identifier: GPL-2.0-only
2-
/**
2+
/*
33
* arch/arm/mac-sa1100/jornada720_ssp.c
44
*
55
* Copyright (C) 2006/2007 Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
@@ -26,6 +26,7 @@ static unsigned long jornada_ssp_flags;
2626

2727
/**
2828
* jornada_ssp_reverse - reverses input byte
29+
* @byte: input byte to reverse
2930
*
3031
* we need to reverse all data we receive from the mcu due to its physical location
3132
* returns : 01110111 -> 11101110
@@ -46,6 +47,7 @@ EXPORT_SYMBOL(jornada_ssp_reverse);
4647

4748
/**
4849
* jornada_ssp_byte - waits for ready ssp bus and sends byte
50+
* @byte: input byte to transmit
4951
*
5052
* waits for fifo buffer to clear and then transmits, if it doesn't then we will
5153
* timeout after <timeout> rounds. Needs mcu running before its called.
@@ -77,6 +79,7 @@ EXPORT_SYMBOL(jornada_ssp_byte);
7779

7880
/**
7981
* jornada_ssp_inout - decide if input is command or trading byte
82+
* @byte: input byte to send (may be %TXDUMMY)
8083
*
8184
* returns : (jornada_ssp_byte(byte)) on success
8285
* : %-ETIMEDOUT on timeout failure

arch/arm/vfp/entry.S

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,9 @@
2323
@
2424
ENTRY(do_vfp)
2525
mov r1, r10
26-
mov r3, r9
27-
b vfp_entry
26+
str lr, [sp, #-8]!
27+
add r3, sp, #4
28+
str r9, [r3]
29+
bl vfp_entry
30+
ldr pc, [sp], #8
2831
ENDPROC(do_vfp)

arch/arm/vfp/vfphw.S

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -172,13 +172,14 @@ vfp_hw_state_valid:
172172
@ out before setting an FPEXC that
173173
@ stops us reading stuff
174174
VFPFMXR FPEXC, r1 @ Restore FPEXC last
175+
mov sp, r3 @ we think we have handled things
176+
pop {lr}
175177
sub r2, r2, #4 @ Retry current instruction - if Thumb
176178
str r2, [sp, #S_PC] @ mode it's two 16-bit instructions,
177179
@ else it's one 32-bit instruction, so
178180
@ always subtract 4 from the following
179181
@ instruction address.
180182

181-
mov lr, r3 @ we think we have handled things
182183
local_bh_enable_and_ret:
183184
adr r0, .
184185
mov r1, #SOFTIRQ_DISABLE_OFFSET
@@ -209,8 +210,9 @@ skip:
209210

210211
process_exception:
211212
DBGSTR "bounce"
213+
mov sp, r3 @ setup for a return to the user code.
214+
pop {lr}
212215
mov r2, sp @ nothing stacked - regdump is at TOS
213-
mov lr, r3 @ setup for a return to the user code.
214216

215217
@ Now call the C code to package up the bounce to the support code
216218
@ r0 holds the trigger instruction

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