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LegNeatoeddyb
LegNeato
authored and
eddyb
committed
Switch all crates to Rust 2024 edition.
1 parent 3d10e24 commit b1d36c7

20 files changed

+1134
-952
lines changed

‎Cargo.toml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ members = [
3434
[workspace.package]
3535
version = "0.9.0"
3636
authors = ["rust-gpu developers", "Embark <opensource@embark-studios.com>"]
37-
edition = "2021"
37+
edition = "2024"
3838
license = "MIT OR Apache-2.0"
3939
repository = "https://github.com/rust-gpu/rust-gpu"
4040

‎crates/rustc_codegen_spirv/Cargo.toml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@ description = "SPIR-V code generator backend for rustc"
44
documentation = "https://rust-gpu.github.io/rust-gpu/api/rustc_codegen_spirv/index.html"
55
version.workspace = true
66
authors.workspace = true
7-
edition = "2024"
7+
edition.workspace = true
88
license.workspace = true
99
repository.workspace = true
1010

‎crates/spirv-std/src/arch.rs

Lines changed: 119 additions & 101 deletions
Original file line numberDiff line numberDiff line change
@@ -87,18 +87,20 @@ pub unsafe fn vector_extract_dynamic<T: Scalar, const N: usize>(
8787
vector: impl Vector<T, N>,
8888
index: usize,
8989
) -> T {
90-
let mut result = T::default();
91-
92-
asm! {
93-
"%vector = OpLoad _ {vector}",
94-
"%element = OpVectorExtractDynamic _ %vector {index}",
95-
"OpStore {element} %element",
96-
vector = in(reg) &vector,
97-
index = in(reg) index,
98-
element = in(reg) &mut result
99-
}
90+
unsafe {
91+
let mut result = T::default();
10092

101-
result
93+
asm! {
94+
"%vector = OpLoad _ {vector}",
95+
"%element = OpVectorExtractDynamic _ %vector {index}",
96+
"OpStore {element} %element",
97+
vector = in(reg) &vector,
98+
index = in(reg) index,
99+
element = in(reg) &mut result
100+
}
101+
102+
result
103+
}
102104
}
103105

104106
/// Make a copy of a vector, with a single, variably selected,
@@ -115,20 +117,22 @@ pub unsafe fn vector_insert_dynamic<T: Scalar, V: Vector<T, N>, const N: usize>(
115117
index: usize,
116118
element: T,
117119
) -> V {
118-
let mut result = V::default();
119-
120-
asm! {
121-
"%vector = OpLoad _ {vector}",
122-
"%element = OpLoad _ {element}",
123-
"%new_vector = OpVectorInsertDynamic _ %vector %element {index}",
124-
"OpStore {result} %new_vector",
125-
vector = in(reg) &vector,
126-
index = in(reg) index,
127-
element = in(reg) &element,
128-
result = in(reg) &mut result,
129-
}
120+
unsafe {
121+
let mut result = V::default();
130122

131-
result
123+
asm! {
124+
"%vector = OpLoad _ {vector}",
125+
"%element = OpLoad _ {element}",
126+
"%new_vector = OpVectorInsertDynamic _ %vector %element {index}",
127+
"OpStore {result} %new_vector",
128+
vector = in(reg) &vector,
129+
index = in(reg) index,
130+
element = in(reg) &element,
131+
result = in(reg) &mut result,
132+
}
133+
134+
result
135+
}
132136
}
133137

134138
/// Fragment-shader discard. Equivalvent to `discard()` from GLSL
@@ -150,17 +154,19 @@ pub fn kill() -> ! {
150154
#[spirv_std_macros::gpu_only]
151155
#[doc(alias = "OpReadClockKHR")]
152156
pub unsafe fn read_clock_khr<const SCOPE: u32>() -> u64 {
153-
let mut result: u64;
154-
155-
asm! {
156-
"%uint = OpTypeInt 32 0",
157-
"%scope = OpConstant %uint {scope}",
158-
"{result} = OpReadClockKHR typeof*{result} %scope",
159-
result = out(reg) result,
160-
scope = const SCOPE,
161-
};
157+
unsafe {
158+
let mut result: u64;
162159

163-
result
160+
asm! {
161+
"%uint = OpTypeInt 32 0",
162+
"%scope = OpConstant %uint {scope}",
163+
"{result} = OpReadClockKHR typeof*{result} %scope",
164+
result = out(reg) result,
165+
scope = const SCOPE,
166+
};
167+
168+
result
169+
}
164170
}
165171

166172
/// Like `read_clock_khr` but returns a vector to avoid requiring the `Int64`
@@ -170,35 +176,39 @@ pub unsafe fn read_clock_khr<const SCOPE: u32>() -> u64 {
170176
#[spirv_std_macros::gpu_only]
171177
#[doc(alias = "OpReadClockKHR")]
172178
pub unsafe fn read_clock_uvec2_khr<V: Vector<u32, 2>, const SCOPE: u32>() -> V {
173-
let mut result = V::default();
179+
unsafe {
180+
let mut result = V::default();
174181

175-
asm! {
176-
"%uint = OpTypeInt 32 0",
177-
"%scope = OpConstant %uint {scope}",
178-
"%result = OpReadClockKHR typeof*{result} %scope",
179-
"OpStore {result} %result",
180-
result = in(reg) &mut result,
181-
scope = const SCOPE,
182-
};
182+
asm! {
183+
"%uint = OpTypeInt 32 0",
184+
"%scope = OpConstant %uint {scope}",
185+
"%result = OpReadClockKHR typeof*{result} %scope",
186+
"OpStore {result} %result",
187+
result = in(reg) &mut result,
188+
scope = const SCOPE,
189+
};
183190

184-
result
191+
result
192+
}
185193
}
186194

187195
#[cfg(target_arch = "spirv")]
188196
unsafe fn call_glsl_op_with_ints<T: Integer, const OP: u32>(a: T, b: T) -> T {
189-
let mut result = T::default();
190-
asm!(
191-
"%glsl = OpExtInstImport \"GLSL.std.450\"",
192-
"%a = OpLoad _ {a}",
193-
"%b = OpLoad _ {b}",
194-
"%result = OpExtInst typeof*{result} %glsl {op} %a %b",
195-
"OpStore {result} %result",
196-
a = in(reg) &a,
197-
b = in(reg) &b,
198-
result = in(reg) &mut result,
199-
op = const OP
200-
);
201-
result
197+
unsafe {
198+
let mut result = T::default();
199+
asm!(
200+
"%glsl = OpExtInstImport \"GLSL.std.450\"",
201+
"%a = OpLoad _ {a}",
202+
"%b = OpLoad _ {b}",
203+
"%result = OpExtInst typeof*{result} %glsl {op} %a %b",
204+
"OpStore {result} %result",
205+
a = in(reg) &a,
206+
b = in(reg) &b,
207+
result = in(reg) &mut result,
208+
op = const OP
209+
);
210+
result
211+
}
202212
}
203213

204214
/// Compute the minimum of two unsigned integers via a GLSL extended instruction.
@@ -245,83 +255,91 @@ pub trait IndexUnchecked<T> {
245255
impl<T> IndexUnchecked<T> for [T] {
246256
#[cfg(target_arch = "spirv")]
247257
unsafe fn index_unchecked(&self, index: usize) -> &T {
248-
// FIXME(eddyb) `let mut result = T::default()` uses (for `asm!`), with this.
249-
let mut result_slot = core::mem::MaybeUninit::uninit();
250-
asm! {
251-
"%slice_ptr = OpLoad _ {slice_ptr_ptr}",
252-
"%data_ptr = OpCompositeExtract _ %slice_ptr 0",
253-
"%result = OpAccessChain _ %data_ptr {index}",
254-
"OpStore {result_slot} %result",
255-
slice_ptr_ptr = in(reg) &self,
256-
index = in(reg) index,
257-
result_slot = in(reg) result_slot.as_mut_ptr(),
258+
unsafe {
259+
// FIXME(eddyb) `let mut result = T::default()` uses (for `asm!`), with this.
260+
let mut result_slot = core::mem::MaybeUninit::uninit();
261+
asm! {
262+
"%slice_ptr = OpLoad _ {slice_ptr_ptr}",
263+
"%data_ptr = OpCompositeExtract _ %slice_ptr 0",
264+
"%result = OpAccessChain _ %data_ptr {index}",
265+
"OpStore {result_slot} %result",
266+
slice_ptr_ptr = in(reg) &self,
267+
index = in(reg) index,
268+
result_slot = in(reg) result_slot.as_mut_ptr(),
269+
}
270+
result_slot.assume_init()
258271
}
259-
result_slot.assume_init()
260272
}
261273

262274
#[cfg(not(target_arch = "spirv"))]
263275
unsafe fn index_unchecked(&self, index: usize) -> &T {
264-
self.get_unchecked(index)
276+
unsafe { self.get_unchecked(index) }
265277
}
266278

267279
#[cfg(target_arch = "spirv")]
268280
unsafe fn index_unchecked_mut(&mut self, index: usize) -> &mut T {
269-
// FIXME(eddyb) `let mut result = T::default()` uses (for `asm!`), with this.
270-
let mut result_slot = core::mem::MaybeUninit::uninit();
271-
asm! {
272-
"%slice_ptr = OpLoad _ {slice_ptr_ptr}",
273-
"%data_ptr = OpCompositeExtract _ %slice_ptr 0",
274-
"%result = OpAccessChain _ %data_ptr {index}",
275-
"OpStore {result_slot} %result",
276-
slice_ptr_ptr = in(reg) &self,
277-
index = in(reg) index,
278-
result_slot = in(reg) result_slot.as_mut_ptr(),
281+
unsafe {
282+
// FIXME(eddyb) `let mut result = T::default()` uses (for `asm!`), with this.
283+
let mut result_slot = core::mem::MaybeUninit::uninit();
284+
asm! {
285+
"%slice_ptr = OpLoad _ {slice_ptr_ptr}",
286+
"%data_ptr = OpCompositeExtract _ %slice_ptr 0",
287+
"%result = OpAccessChain _ %data_ptr {index}",
288+
"OpStore {result_slot} %result",
289+
slice_ptr_ptr = in(reg) &self,
290+
index = in(reg) index,
291+
result_slot = in(reg) result_slot.as_mut_ptr(),
292+
}
293+
result_slot.assume_init()
279294
}
280-
result_slot.assume_init()
281295
}
282296

283297
#[cfg(not(target_arch = "spirv"))]
284298
unsafe fn index_unchecked_mut(&mut self, index: usize) -> &mut T {
285-
self.get_unchecked_mut(index)
299+
unsafe { self.get_unchecked_mut(index) }
286300
}
287301
}
288302

289303
impl<T, const N: usize> IndexUnchecked<T> for [T; N] {
290304
#[cfg(target_arch = "spirv")]
291305
unsafe fn index_unchecked(&self, index: usize) -> &T {
292-
// FIXME(eddyb) `let mut result = T::default()` uses (for `asm!`), with this.
293-
let mut result_slot = core::mem::MaybeUninit::uninit();
294-
asm! {
295-
"%result = OpAccessChain _ {array_ptr} {index}",
296-
"OpStore {result_slot} %result",
297-
array_ptr = in(reg) self,
298-
index = in(reg) index,
299-
result_slot = in(reg) result_slot.as_mut_ptr(),
306+
unsafe {
307+
// FIXME(eddyb) `let mut result = T::default()` uses (for `asm!`), with this.
308+
let mut result_slot = core::mem::MaybeUninit::uninit();
309+
asm! {
310+
"%result = OpAccessChain _ {array_ptr} {index}",
311+
"OpStore {result_slot} %result",
312+
array_ptr = in(reg) self,
313+
index = in(reg) index,
314+
result_slot = in(reg) result_slot.as_mut_ptr(),
315+
}
316+
result_slot.assume_init()
300317
}
301-
result_slot.assume_init()
302318
}
303319

304320
#[cfg(not(target_arch = "spirv"))]
305321
unsafe fn index_unchecked(&self, index: usize) -> &T {
306-
self.get_unchecked(index)
322+
unsafe { self.get_unchecked(index) }
307323
}
308324

309325
#[cfg(target_arch = "spirv")]
310326
unsafe fn index_unchecked_mut(&mut self, index: usize) -> &mut T {
311-
// FIXME(eddyb) `let mut result = T::default()` uses (for `asm!`), with this.
312-
let mut result_slot = core::mem::MaybeUninit::uninit();
313-
asm! {
314-
"%result = OpAccessChain _ {array_ptr} {index}",
315-
"OpStore {result_slot} %result",
316-
array_ptr = in(reg) self,
317-
index = in(reg) index,
318-
result_slot = in(reg) result_slot.as_mut_ptr(),
327+
unsafe {
328+
// FIXME(eddyb) `let mut result = T::default()` uses (for `asm!`), with this.
329+
let mut result_slot = core::mem::MaybeUninit::uninit();
330+
asm! {
331+
"%result = OpAccessChain _ {array_ptr} {index}",
332+
"OpStore {result_slot} %result",
333+
array_ptr = in(reg) self,
334+
index = in(reg) index,
335+
result_slot = in(reg) result_slot.as_mut_ptr(),
336+
}
337+
result_slot.assume_init()
319338
}
320-
result_slot.assume_init()
321339
}
322340

323341
#[cfg(not(target_arch = "spirv"))]
324342
unsafe fn index_unchecked_mut(&mut self, index: usize) -> &mut T {
325-
self.get_unchecked_mut(index)
343+
unsafe { self.get_unchecked_mut(index) }
326344
}
327345
}

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