Create a basic exception-handler

[zachary-cauchi]

With #19 merged in, we now have access to the CoP0 exception-related registers, meaning we can create basic exception-handling.

Exception types:

• Reset / NMI
  • Reset
  • NMI
• TLB Refill
  • Instruction fetch / load
  • Store
• Performance Counter
• Debug
• Interrupt
• Others
  • TLB Modified
  • TLB Invalid (Instruction fetch / load)
  • TLB Invalid (Store)
  • Address Error (Instruction fetch / load)
  • Address Error (Store)
  • Bus Error (Instruction fetch / load)
  • Bus error (Store)
  • System Call
  • Break
  • Reserved Instruction
  • Coprocessor Unusable
  • Overflow
  • Trap

Definition of Done:

• Create a basic panic handler, if possible using Rust's panic_handler function.
• Dump the values of the exception registers (such as CoP0.Cause) to EEOut.
• Create basic exception handlers which cover all the above listed exception types.

[zachary-cauchi]

Hi @Ravenslofty. Managed to get a basic panic handler set up and printing out a core dump of the implemented CoP0 registers. I'm now looking into how to set up exception handlers for the lower-level exceptions but I'm a bit confused. Based on what I read in the EE Core User's Manual, and assuming I'm understanding right, the PS2 will call exception handlers found at specific address and it is there thatwe follow the procedure outlined in chapters 4.1.2 and 4.1.3. Is that more or less corect?

[Ravenslofty]

Yes, that's correct.

[Ravenslofty]

(Though for the sake of clarity, when the manual says "the following processes are executed", it's referring to the CPU executing them, rather than user code needing to do this.)

[zachary-cauchi]

Ah okay, that makes sense. Thanks. I'll next work on getting an exception handler set up and printing a similar coredump to the panic handler. Presumably, I'll need to make changes to hte linkfile to get the function located at the correct memory address. Will keep you posted here on any updates/challenges.

[Ravenslofty]

Do keep in mind that you're working in an interrupt context when doing so. That means things like disabling interrupts at the start of the handler, and being mindful of saving registers if necessary.

Also, while you can just hexdump the exception registers, MIPS has a sneaky trick: Cause.ExcCode is offset by two bits, which means if you AND it with, say, 0xFF, you get a table offset you can add to a base to index a jump table. That lets you quickly dispatch to a specific handler based on the exception code.

[zachary-cauchi]

Ah I see, hadn't thought of that. Thanks, will take the precautions. That's pretty neat, will be sure to implement that! Thanks!

[zachary-cauchi]

Hi @Ravenslofty. Apologies for the delay with updates and progress. Finally finished off the last of the V_COMMON exceptions. When you can, would you please give it a look and give me feedback on possible improvements? It's a bit messy cos I was experimenting a lot to test the functions.

[Ravenslofty]

Feedback given. Looking back at this, there are some exceptions not worth handling: Reset jumps into the bios immediately - nothing we can do there. I think on retail PS2s NMI also goes into reset.

TLB Refill load/store are handled identically, although if we're using the bios memory mapping they should never fire.