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Add Attiny417/817/1617/3217 support
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15 files changed

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-12
lines changed

15 files changed

+23722
-12
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Cargo.toml

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@@ -62,8 +62,10 @@ attiny404 = ["device-selected"]
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attiny412 = ["device-selected"]
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attiny414 = ["device-selected"]
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attiny416 = ["device-selected"]
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attiny417 = ["device-selected"]
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attiny44a = ["device-selected"]
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attiny816 = ["device-selected"]
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attiny817 = ["device-selected"]
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attiny828 = ["device-selected"]
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attiny84 = ["device-selected"]
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attiny841 = ["device-selected"]
@@ -72,6 +74,8 @@ attiny85 = ["device-selected"]
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attiny861 = ["device-selected"]
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attiny88 = ["device-selected"]
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attiny1614 = ["device-selected"]
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attiny1617 = ["device-selected"]
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attiny3217 = ["device-selected"]
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avr64du32 = ["device-selected"]
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avr64du28 = ["device-selected"]
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rt = ["avr-device-macros"]

Makefile

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@@ -1,7 +1,6 @@
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all: deps chips
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3-
CHIPS := at90usb1286 atmega1280 atmega1284p atmega128a atmega128rfa1 atmega16 atmega164pa atmega168 atmega16u2 atmega2560 atmega8 atmega8u2 atmega324pa atmega328p atmega328pb atmega32a atmega32u2 atmega32u4 atmega3208 atmega3209 atmega4808 atmega4809 atmega48p atmega64 atmega644 atmega88p attiny13a attiny202 attiny212 attiny214 attiny2313 attiny2313a attiny26 attiny402 attiny404 attiny412 attiny414 attiny416 attiny44a attiny84 attiny85 attiny88 attiny816 attiny828 attiny841 attiny84a attiny861 attiny167 attiny1614 avr64du32 avr64du28
4-
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CHIPS := at90usb1286 atmega1280 atmega1284p atmega128a atmega128rfa1 atmega16 atmega164pa atmega168 atmega16u2 atmega2560 atmega8 atmega8u2 atmega324pa atmega328p atmega328pb atmega32a atmega32u2 atmega32u4 atmega3208 atmega3209 atmega4808 atmega4809 atmega48p atmega64 atmega644 atmega88p attiny13a attiny202 attiny212 attiny214 attiny2313 attiny2313a attiny26 attiny402 attiny404 attiny412 attiny414 attiny416 attiny417 attiny44a attiny84 attiny85 attiny88 attiny816 attiny817 attiny828 attiny841 attiny84a attiny861 attiny167 attiny1614 attiny1617 attiny3217 avr64du32 avr64du28
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RUSTUP_TOOLCHAIN ?= nightly
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PATCHES := $(foreach chip, $(CHIPS), $(wildcard patch/$(chip).yaml))

README.md

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@@ -24,16 +24,20 @@ Via the feature you can select which chip you want the register specifications f
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| `atmega324pa` | | | | `attiny412` |
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| `atmega328p` | | | | `attiny414` |
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| `atmega328pb` | | | | `attiny416` |
27-
| `atmega32a` | | | | `attiny44a` |
28-
| `atmega1280` | | | | `attiny84` |
29-
| `atmega1284p` | | | | `attiny85` |
30-
| `atmega128a` | | | | `attiny88` |
31-
| `atmega128rfa1` | | | | `attiny816` |
32-
| `atmega2560` | | | | `attiny828` |
33-
| `atmega164pa` | | | | `attiny841` |
27+
| `atmega32a` | | | | `attiny417` |
28+
| `atmega1280` | | | | `attiny44a` |
29+
| `atmega1284p` | | | | `attiny84` |
30+
| `atmega128a` | | | | `attiny85` |
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| `atmega128rfa1` | | | | `attiny88` |
32+
| `atmega2560` | | | | `attiny816` |
33+
| `atmega164pa` | | | | `attiny817` |
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| | | | | `attiny828` |
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| | | | | `attiny841` |
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| | | | | `attiny84a` |
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| | | | | `attiny861` |
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| | | | | `attiny1614` |
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| | | | | `attiny1617` |
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| | | | | `attiny3217` |
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| | | | | `attiny2313` |
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| | | | | `attiny2313a` |
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patch/attiny1617.yaml

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@@ -0,0 +1,5 @@
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_svd: ../svd/attiny1617.svd
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3+
_include:
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- common/attiny-xmega/common.yaml
5+
- common/attiny-xmega/1-series.yaml

patch/attiny3217.yaml

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_svd: ../svd/attiny3217.svd
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_include:
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- common/attiny-xmega/common.yaml
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- common/attiny-xmega/1-series.yaml

patch/attiny417.yaml

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_svd: ../svd/attiny417.svd
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_include:
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- common/attiny-xmega/common.yaml
5+
- common/attiny-xmega/1-series.yaml

patch/attiny817.yaml

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_svd: ../svd/attiny817.svd
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_include:
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- common/attiny-xmega/common.yaml
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- common/attiny-xmega/1-series.yaml
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@@ -1,4 +1,9 @@
1-
# Nothing needed beyond common config
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# This is probably good for at least ATtiny212/214/412/414/416, but may not be valid for ATtiny81* and ATtiny161*
32

4-
{}
3+
TCD*:
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EVCTRL?:
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CFG:
6+
_replace_enum:
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NEITHER: [0, "Neither Filter nor Asynchronous Event is enabled"]
8+
FILTERON: [1, "Input Capture Noise Cancellation Filter enabled"]
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ASYNCON: [2, "Asynchronous Event output qualification enabled"]

patch/common/attiny-xmega/common.yaml

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@@ -62,6 +62,17 @@ PORT[A-Z]:
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IN:
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name: INPUT
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DIR:
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"P*":
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# Make all Pins use the same enum
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_replace_enum:
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Input: [0, "Input"]
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Output: [1, "Output"]
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# make PINxCTRL a rust slice
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_array:
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"PIN?CTRL": {}
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SPI*:
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CTRLA:
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PRESC:
@@ -74,3 +85,107 @@ SPI*:
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[2, "Peripheral clock / 64 if CLK2X == 0 else Peripheral clock / 32"]
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CLK_PER_128_64:
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[3, "Peripheral clock / 128 if CLK2X == 0 else Peripheral clock / 64"]
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DORD:
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# Make it an enum
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_replace_enum:
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MsbFirst: [0, "Most significant byte first"]
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LsbFirst: [1, "Least significant byte first"]
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"USART*":
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STATUS:
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_modify:
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# The RXSIF bit is actually writable to clear the flag
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RXSIF:
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access: read-write
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# The WFB bit is write-only
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WFB:
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access: write-only
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CPUINT:
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CTRLA:
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IVSEL:
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_replace_enum:
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AFTERBOOT: [0, "Interrupt vectors are placed after the BOOT section of the Flash"]
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INBOOT: [1, "Interrupt vectors are placed at the start of the BOOT section of the Flash"]
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CVT:
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_replace_enum:
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NORMAL: [0, "Compact Vector Table function is disabled"]
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COMPACT: [1, "Compact Vector Table function is enabled"]
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LVL0RR:
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_replace_enum:
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FIXED: [0, "Priority is fixed for priority level 0 interrupt requests: The lowest interrupt vector address has the highest priority."]
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ROUNDROBIN: [1, "The round robin priority scheme is enabled for priority level 0 interrupt requests"]
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CCL:
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_cluster:
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"LUT%s":
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description: "CCL LUT configuration cluster"
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"LUT?CTRLA": {}
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"LUT?CTRLB": {}
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"LUT?CTRLC": {}
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"TRUTH?": {}
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# turn all SEQCTRL-registers into slices
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_array:
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"SEQCTRL?": {}
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EVSYS:
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# make ASYNCCHx, SYNCCHx, ASYNCUSERx and SYNCUSERx a rust slice
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_modify:
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"ASYNCUSER*":
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description: "Users of asynchronous channels"
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"SYNCUSER*":
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description: "Users of synchronous channels"
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_array:
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"ASYNCCH*": {}
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"SYNCCH*": {}
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"ASYNCUSER*": {}
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"SYNCUSER*": {}
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146+
TCB*:
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_add:
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# FIXME: no idea how to add a write constraint with range [0x0, 0xFF] to
149+
# added registers to prevent bits() from being marked as unsafe
150+
CCMPL:
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description: Lower Compare or Capture in 8-bit PWM mode
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addressOffset: 0x0C
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access: read-write
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size: 8
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CCMPH:
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description: Upper Compare or Capture in 8-bit PWM mode
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addressOffset: 0x0D
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access: read-write
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size: 8
160+
161+
CRCSCAN:
162+
CTRLB:
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SRC:
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_replace_enum:
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FLASH: [0, "CRC on entire flash"]
166+
BOOTAPP: [1, "CRC on boot and appl section of flash"]
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BOOT: [2, "CRC on boot section of flash"]
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MODE:
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_replace_enum:
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PRIORITY: [0, "Priority to flash"]
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172+
NVMCTRL:
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CTRLA:
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CMD:
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_replace_enum:
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NONE: [0, "No command"]
177+
WP: [1, "Write page"]
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ER: [2, "Erase page"]
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ERWP: [3, "Erase and write page"]
180+
PBC: [4, "Page buffer clear"]
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CHER: [5, "Chip erase"]
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EEER: [6, "EEPROM erase"]
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WFU: [7, "Write fuse (PDI only)"]
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185+
SLPCTRL:
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CTRLA:
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SMODE:
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_replace_enum:
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IDLE: [0, "Idle mode"]
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STANDBY: [1, "Standby Mode"]
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PDOWN: [2, "Power-down Mode"]

src/devices/mod.rs

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@@ -119,6 +119,14 @@ pub mod attiny167;
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#[cfg(feature = "attiny1614")]
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pub mod attiny1614;
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122+
/// [ATtiny1617](https://www.microchip.com/wwwproducts/en/ATtiny1617)
123+
#[cfg(feature = "attiny1617")]
124+
pub mod attiny1617;
125+
126+
/// [ATtiny3217](https://www.microchip.com/wwwproducts/en/ATtiny3217)
127+
#[cfg(feature = "attiny3217")]
128+
pub mod attiny3217;
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122130
/// [ATtiny202](https://www.microchip.com/wwwproducts/en/ATtiny202)
123131
#[cfg(feature = "attiny202")]
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pub mod attiny202;
@@ -163,6 +171,10 @@ pub mod attiny414;
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#[cfg(feature = "attiny416")]
164172
pub mod attiny416;
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174+
/// [ATtiny417](https://www.microchip.com/wwwproducts/en/ATtiny417)
175+
#[cfg(feature = "attiny417")]
176+
pub mod attiny417;
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/// [ATtiny44a](https://www.microchip.com/en-us/product/ATtiny44a)
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#[cfg(feature = "attiny44a")]
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pub mod attiny44a;
@@ -171,6 +183,10 @@ pub mod attiny44a;
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#[cfg(feature = "attiny816")]
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pub mod attiny816;
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186+
/// [ATtiny817](https://www.microchip.com/wwwproducts/en/ATtiny817)
187+
#[cfg(feature = "attiny817")]
188+
pub mod attiny817;
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/// [ATtiny828](https://www.microchip.com/wwwproducts/en/ATtiny828)
175191
#[cfg(feature = "attiny828")]
176192
pub mod attiny828;

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