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‎CHANGELOG.md

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@@ -30,6 +30,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- Better register definitions for peripherals of the ATmega128RFA1 ([#173]).
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### Added
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- Support for `AT90CAN128`, `AT90CAN64`, and `AT90CAN32` ([#206]).
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- Support for `ATtiny204`, `ATtiny804`, and `ATtiny1604` ([#182]).
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- Support for `ATtiny1606` ([#183]).
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- Support for `ATtiny1626` ([#185]). The `VPORTA.DIR` register is currently
@@ -45,6 +46,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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[#185]: https://github.com/Rahix/avr-device/pull/185
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[#189]: https://github.com/Rahix/avr-device/pull/189
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[#195]: https://github.com/Rahix/avr-device/pull/195
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[#206]: https://github.com/Rahix/avr-device/pull/206
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## [0.7.0] - 2025-01-05

‎Cargo.toml

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@@ -27,6 +27,9 @@ features = ["docsrs"]
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[features]
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device-selected = []
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at90can128 = ["device-selected"]
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at90can64 = ["device-selected"]
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at90can32 = ["device-selected"]
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at90usb1286 = ["device-selected"]
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atmega1280 = ["device-selected"]
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atmega1284p = ["device-selected"]
@@ -100,22 +103,22 @@ docsrs = ["rt", "ufmt", "atmega328p", "atmega32u4", "atmega2560", "attiny85", "a
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[dependencies]
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bare-metal = "1.0.0"
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vcell = "0.1.2"
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vcell = "0.1.3"
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cfg-if = "1.0.0"
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ufmt = { version = "0.2.0", optional = true }
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critical-section = { version = "1.1.1", optional = true }
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critical-section = { version = "1.2.0", optional = true }
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[dependencies.avr-device-macros]
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path = "macros/"
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version = "=0.7.0"
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optional = true
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[build-dependencies]
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svd2rust = "=0.36.1"
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svdtools = "=0.4.6"
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svd2rust = { version = "=0.36.1", default-features = false }
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svdtools = { version = "=0.5.0", default-features = false }
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atdf2svd = { version = "=0.5.1", default-features = false }
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prettyplease = "=0.2.32"
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svd-rs = "=0.14.12"
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yaml-rust2 = "=0.10.1"
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svd-rs = { version = "=0.14.12", default-features = false }
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yaml-rust2 = { version = "=0.10.2", default-features = false }
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syn = { version = "=2.0.101", default-features = false, features = ["full", "parsing"] }
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anyhow = "1.0"

‎README.md

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@@ -15,9 +15,9 @@ Via the feature you can select which chip you want the register specifications f
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| ATmega | ATmega USB | ATmega 0,1 Series | AT90 | ATtiny |
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| :-------------: | :----------: | :---------------: | :-----------: | :-----------: |
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| `atmega8` | `atmega8u2` | `atmega3208` | `at90usb1286` | `attiny13a` |
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| `atmega48p` | `atmega16u2` | `atmega3209` | | `attiny167` |
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| `atmega64` | `atmega32u2` | `atmega4808` | | `attiny202` |
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| `atmega644` | `atmega32u4` | `atmega4809` | | `attiny204` |
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| `atmega48p` | `atmega16u2` | `atmega3209` | `at90can128` | `attiny167` |
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| `atmega64` | `atmega32u2` | `atmega4808` | `at90can64` | `attiny202` |
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| `atmega644` | `atmega32u4` | `atmega4809` | `at90can32` | `attiny204` |
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| `atmega88p` | `avr64du32` | | | `attiny212` |
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| `atmega16` | `avr64du28` | | | `attiny214` |
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| `atmega168` | | | | `attiny402` |

‎build.rs

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@@ -109,7 +109,7 @@ impl InputFinder {
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let atdf_file = File::open(&atdf_path)
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.map_err(io_error_in_path(&atdf_path))
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.context("could not open ATDF file")?;
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let atdf = atdf2svd::atdf::parse(atdf_file, &mut HashSet::new())
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let atdf = atdf2svd::atdf::parse(atdf_file, &HashSet::new())
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.map_err(atdf_error(&atdf_path))?;
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let patch_path = patches_dir.join(&mcu_name).with_extension("yaml");
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let patch = if patch_path
@@ -222,7 +222,7 @@ impl SvdGenerator {
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let svd_path = if let Some(patch) = &inputs.patch {
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let mut reader = svdtools::patch::process_reader(
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unpatched_reader,
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&patch,
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patch,
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&Default::default(),
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&Default::default(),
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)
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svd2rust_config.ident_formats = IdentFormats::legacy_theme();
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let generated_stream =
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svd2rust::generate::device::render(&svd, &svd2rust_config, &mut String::new())
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svd2rust::generate::device::render(svd, &svd2rust_config, &mut String::new())
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.context("failed to generate svd2rust module")?;
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let mut syntax_tree: syn::File = syn::parse2(generated_stream)
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) -> anyhow::Result<()> {
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for item in syntax_tree.items.iter_mut() {
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if let syn::Item::Static(statik) = item {
296-
if statik.ident.to_string() == "DEVICE_PERIPHERALS" {
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if statik.ident == "DEVICE_PERIPHERALS" {
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*item = syn::parse_quote! {use super::DEVICE_PERIPHERALS;};
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return Ok(());
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}

‎patch/at90can128.yaml

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_include:
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- "common/ac.yaml"
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- "common/at90/adc.yaml"
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- "common/at90/spi.yaml"
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- "common/at90/usart.yaml"

‎patch/at90can32.yaml

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_include:
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- "common/ac.yaml"
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- "common/at90/adc.yaml"
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- "common/at90/spi.yaml"
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- "common/at90/usart.yaml"

‎patch/at90can64.yaml

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_include:
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- "common/ac.yaml"
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- "common/at90/adc.yaml"
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- "common/at90/spi.yaml"
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- "common/at90/usart.yaml"

‎patch/common/at90/adc.yaml

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_include:
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- "../adc.yaml"
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ADC:
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ADMUX:
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MUX:
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_replace_enum:
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ADC0: [0, "ADC Single Ended Input pin 0"]
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ADC1: [1, "ADC Single Ended Input pin 1"]
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ADC2: [2, "ADC Single Ended Input pin 2"]
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ADC3: [3, "ADC Single Ended Input pin 3"]
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ADC4: [4, "ADC Single Ended Input pin 4"]
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ADC5: [5, "ADC Single Ended Input pin 5"]
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ADC6: [6, "ADC Single Ended Input pin 6"]
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ADC7: [7, "ADC Single Ended Input pin 7"]
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ADC0_ADC0_10X: [8, "ADC Differential Inputs Positive pin 0 Negative pin 0 10x Gain"]
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ADC1_ADC0_10X: [9, "ADC Differential Inputs Positive pin 1 Negative pin 0 10x Gain"]
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ADC0_ADC0_200X: [10, "ADC Differential Inputs Positive pin 0 Negative pin 0 200x Gain"]
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ADC1_ADC0_200X: [11, "ADC Differential Inputs Positive pin 1 Negative pin 0 200x Gain"]
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ADC2_ADC2_10X: [12, "ADC Differential Inputs Positive pin 2 Negative pin 2 10x Gain"]
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ADC3_ADC2_10X: [13, "ADC Differential Inputs Positive pin 3 Negative pin 2 10x Gain"]
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ADC2_ADC2_200X: [14, "ADC Differential Inputs Positive pin 2 Negative pin 2 200x Gain"]
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ADC3_ADC2_200X: [15, "ADC Differential Inputs Positive pin 3 Negative pin 2 200x Gain"]
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ADC0_ADC1_1X: [16, "ADC Differential Inputs Positive pin 0 Negative pin 1 1x Gain"]
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ADC1_ADC1_1X: [17, "ADC Differential Inputs Positive pin 1 Negative pin 1 1x Gain"]
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ADC2_ADC1_1X: [18, "ADC Differential Inputs Positive pin 2 Negative pin 1 1x Gain"]
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ADC3_ADC1_1X: [19, "ADC Differential Inputs Positive pin 3 Negative pin 1 1x Gain"]
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ADC4_ADC1_1X: [20, "ADC Differential Inputs Positive pin 4 Negative pin 1 1x Gain"]
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ADC5_ADC1_1X: [21, "ADC Differential Inputs Positive pin 5 Negative pin 1 1x Gain"]
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ADC6_ADC1_1X: [22, "ADC Differential Inputs Positive pin 6 Negative pin 1 1x Gain"]
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ADC7_ADC1_1X: [23, "ADC Differential Inputs Positive pin 7 Negative pin 1 1x Gain"]
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ADC0_ADC2_1X: [24, "ADC Differential Inputs Positive pin 0 Negative pin 2 1x Gain"]
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ADC1_ADC2_1X: [25, "ADC Differential Inputs Positive pin 1 Negative pin 2 1x Gain"]
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ADC2_ADC2_1X: [26, "ADC Differential Inputs Positive pin 2 Negative pin 2 1x Gain"]
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ADC3_ADC2_1X: [27, "ADC Differential Inputs Positive pin 3 Negative pin 2 1x Gain"]
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ADC4_ADC2_1X: [28, "ADC Differential Inputs Positive pin 4 Negative pin 2 1x Gain"]
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ADC5_ADC2_1X: [29, "ADC Differential Inputs Positive pin 5 Negative pin 2 1x Gain"]
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ADC_VBG: [30, "Internal Reference (VBG)"]
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ADC_GND: [31, "0V (GND)"]

‎patch/common/at90/spi.yaml

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# Patches for the SPI peripheral
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#
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# Fix the SP2X status register bit to have write access
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SPI*:
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SPSR:
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_modify:
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SPIF:
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access: read-only
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WCOL:
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access: read-only
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‎patch/common/at90/usart.yaml

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USART?:
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UCSR?A:
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_modify:
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UPE?:
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access: read-only
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DOR?:
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access: read-only
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FE?:
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access: read-only
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UDRE?:
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access: read-only
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TXC?:
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description: "USART Transmit Complete"
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RXC?:
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access: read-only
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UCSR?B:
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_modify:
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RXB8?:
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access: read-only
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UCSR?C:
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UMSEL?:
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_replace_enum:
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USART_ASYNC: [0, "Asynchronous Operation"]
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USART_SYNC: [1, "Synchronous Operation"]
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UPM?:
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_replace_enum:
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DISABLED: [0, "Disabled"]
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PARITY_EVEN: [2, "Enabled, Even Parity"]
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PARITY_ODD: [3, "Enabled, Odd Parity"]
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USBS?:
31+
_replace_enum:
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STOP1: [0, "1-bit"]
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STOP2: [1, "2-bit"]
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UCSZ?:
35+
_replace_enum:
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CHR5: [0, "Character Size: 5 bit"]
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CHR6: [1, "Character Size: 6 bit"]
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CHR7: [2, "Character Size: 7 bit"]
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CHR8: [3, "Character Size: 8 bit"]
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UCPOL?:
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_replace_enum:
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RISING_EDGE: [0, "Transmit on Rising XCKn Edge, Receive on Falling XCKn Edge"]
43+
FALLING_EDGE: [1, "Transmit on Falling XCKn Edge, Receive on Rising XCKn Edge"]

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