@@ -1273,65 +1273,22 @@ MachineInstr *SIPeepholeSDWA::createSDWAVersion(MachineInstr &MI) {
1273
1273
}
1274
1274
}
1275
1275
1276
- // Copy dst_sel if present, initialize otherwise if needed
1277
- if (AMDGPU::hasNamedOperand (SDWAOpcode, AMDGPU::OpName::dst_sel)) {
1278
- MachineOperand *DstSel = TII->getNamedOperand (MI, AMDGPU::OpName::dst_sel);
1279
- if (DstSel) {
1280
- SDWAInst.add (*DstSel);
1281
- } else {
1282
- SDWAInst.addImm (AMDGPU::SDWA::SdwaSel::DWORD);
1283
- }
1284
- }
1276
+ // Initialize SDWA specific operands
1277
+ if (AMDGPU::hasNamedOperand (SDWAOpcode, AMDGPU::OpName::dst_sel))
1278
+ SDWAInst.addImm (AMDGPU::SDWA::SdwaSel::DWORD);
1285
1279
1286
- // Copy dst_unused if present, initialize otherwise if needed
1287
- if (AMDGPU::hasNamedOperand (SDWAOpcode, AMDGPU::OpName::dst_unused)) {
1288
- MachineOperand *DstUnused = TII->getNamedOperand (MI, AMDGPU::OpName::dst_unused);
1289
- if (DstUnused) {
1290
- SDWAInst.add (*DstUnused);
1291
- } else {
1292
- SDWAInst.addImm (AMDGPU::SDWA::DstUnused::UNUSED_PAD);
1293
- }
1294
- }
1280
+ if (AMDGPU::hasNamedOperand (SDWAOpcode, AMDGPU::OpName::dst_unused))
1281
+ SDWAInst.addImm (AMDGPU::SDWA::DstUnused::UNUSED_PAD);
1295
1282
1296
- // Copy src0_sel if present, initialize otherwise
1297
1283
assert (AMDGPU::hasNamedOperand (SDWAOpcode, AMDGPU::OpName::src0_sel));
1298
- MachineOperand *Src0Sel = TII->getNamedOperand (MI, AMDGPU::OpName::src0_sel);
1299
- if (Src0Sel) {
1300
- SDWAInst.add (*Src0Sel);
1301
- } else {
1302
- SDWAInst.addImm (AMDGPU::SDWA::SdwaSel::DWORD);
1303
- }
1284
+ SDWAInst.addImm (AMDGPU::SDWA::SdwaSel::DWORD);
1304
1285
1305
- // Copy src1_sel if present, initialize otherwise if needed
1306
1286
if (Src1) {
1307
1287
assert (AMDGPU::hasNamedOperand (SDWAOpcode, AMDGPU::OpName::src1_sel));
1308
- MachineOperand *Src1Sel = TII->getNamedOperand (MI, AMDGPU::OpName::src1_sel);
1309
- if (Src1Sel) {
1310
- SDWAInst.add (*Src1Sel);
1311
- } else {
1312
- SDWAInst.addImm (AMDGPU::SDWA::SdwaSel::DWORD);
1313
- }
1288
+ SDWAInst.addImm (AMDGPU::SDWA::SdwaSel::DWORD);
1314
1289
}
1315
1290
1316
1291
// Check for a preserved register that needs to be copied.
1317
- auto *DstUnused = TII->getNamedOperand (MI, AMDGPU::OpName::dst_unused);
1318
- if (DstUnused &&
1319
- DstUnused->getImm () == AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE) {
1320
- // We expect, if we are here, that the instruction was already in it's SDWA form,
1321
- // with a tied operand.
1322
- assert (Dst && Dst->isTied ());
1323
- assert (Opcode == static_cast <unsigned int >(SDWAOpcode));
1324
- // We also expect a vdst, since sdst can't preserve.
1325
- auto PreserveDstIdx = AMDGPU::getNamedOperandIdx (SDWAOpcode, AMDGPU::OpName::vdst);
1326
- assert (PreserveDstIdx != -1 );
1327
-
1328
- auto TiedIdx = MI.findTiedOperandIdx (PreserveDstIdx);
1329
- auto Tied = MI.getOperand (TiedIdx);
1330
-
1331
- SDWAInst.add (Tied);
1332
- SDWAInst->tieOperands (PreserveDstIdx, SDWAInst->getNumOperands () - 1 );
1333
- }
1334
-
1335
1292
MachineInstr *Ret = SDWAInst.getInstr ();
1336
1293
TII->fixImplicitOperands (*Ret);
1337
1294
return Ret;
0 commit comments