Regen llvm/test//CodeGen/AMDGPU/vni8-across-blocks.ll

Author: ronlieb

llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll

@@ -1070,37 +1070,35 @@ define amdgpu_kernel void @v8i8_phi_zeroinit(ptr addrspace(1) %src1, ptr addrspa
 ; FEATURE-NEXT:    v_lshlrev_b32_e32 v5, 3, v0
 ; FEATURE-NEXT:    v_cmp_lt_u32_e64 s[0:1], 14, v0
 ; FEATURE-NEXT:    v_cmp_gt_u32_e32 vcc, 15, v0
-; FEATURE-NEXT:    ; implicit-def: $vgpr1_vgpr2
+; FEATURE-NEXT:    ; implicit-def: $vgpr3_vgpr4
 ; FEATURE-NEXT:    s_waitcnt lgkmcnt(0)
-; FEATURE-NEXT:    global_load_dwordx2 v[3:4], v5, s[8:9]
+; FEATURE-NEXT:    global_load_dwordx2 v[1:2], v5, s[8:9]
 ; FEATURE-NEXT:    s_and_saveexec_b64 s[2:3], vcc
 ; FEATURE-NEXT:    s_cbranch_execz .LBB9_2
 ; FEATURE-NEXT:  ; %bb.1: ; %bb.1
-; FEATURE-NEXT:    global_load_dwordx2 v[1:2], v5, s[10:11]
-; FEATURE-NEXT:    s_mov_b32 s4, 0
+; FEATURE-NEXT:    global_load_dwordx2 v[3:4], v5, s[10:11]
 ; FEATURE-NEXT:    v_cmp_gt_u32_e32 vcc, 7, v0
-; FEATURE-NEXT:    s_mov_b32 s5, s4
 ; FEATURE-NEXT:    s_waitcnt vmcnt(1)
-; FEATURE-NEXT:    v_mov_b32_e32 v3, s4
-; FEATURE-NEXT:    v_mov_b32_e32 v4, s5
+; FEATURE-NEXT:    v_mov_b32_e32 v1, 0
 ; FEATURE-NEXT:    s_andn2_b64 s[0:1], s[0:1], exec
 ; FEATURE-NEXT:    s_and_b64 s[4:5], vcc, exec
+; FEATURE-NEXT:    v_mov_b32_e32 v2, v1
 ; FEATURE-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]
 ; FEATURE-NEXT:  .LBB9_2: ; %Flow
 ; FEATURE-NEXT:    s_or_b64 exec, exec, s[2:3]
 ; FEATURE-NEXT:    s_and_saveexec_b64 s[2:3], s[0:1]
 ; FEATURE-NEXT:    s_cbranch_execz .LBB9_4
 ; FEATURE-NEXT:  ; %bb.3: ; %bb.2
 ; FEATURE-NEXT:    s_waitcnt vmcnt(0)
-; FEATURE-NEXT:    v_mov_b32_e32 v1, v3
+; FEATURE-NEXT:    v_mov_b32_e32 v4, v2
 ; FEATURE-NEXT:    v_mov_b32_e32 v0, 0
-; FEATURE-NEXT:    v_mov_b32_e32 v2, v4
-; FEATURE-NEXT:    global_store_dwordx2 v0, v[3:4], s[12:13]
+; FEATURE-NEXT:    v_mov_b32_e32 v3, v1
+; FEATURE-NEXT:    global_store_dwordx2 v0, v[1:2], s[12:13]
 ; FEATURE-NEXT:  .LBB9_4: ; %bb.3
 ; FEATURE-NEXT:    s_or_b64 exec, exec, s[2:3]
 ; FEATURE-NEXT:    v_mov_b32_e32 v0, 0
 ; FEATURE-NEXT:    s_waitcnt vmcnt(0)
-; FEATURE-NEXT:    global_store_dwordx2 v0, v[1:2], s[14:15]
+; FEATURE-NEXT:    global_store_dwordx2 v0, v[3:4], s[14:15]
 ; FEATURE-NEXT:    s_endpgm
 ;
 ; DEFAULT-LABEL: v8i8_phi_zeroinit:
@@ -1109,37 +1107,35 @@ define amdgpu_kernel void @v8i8_phi_zeroinit(ptr addrspace(1) %src1, ptr addrspa
 ; DEFAULT-NEXT:    v_lshlrev_b32_e32 v5, 3, v0
 ; DEFAULT-NEXT:    v_cmp_lt_u32_e64 s[0:1], 14, v0
 ; DEFAULT-NEXT:    v_cmp_gt_u32_e32 vcc, 15, v0
-; DEFAULT-NEXT:    ; implicit-def: $vgpr1_vgpr2
+; DEFAULT-NEXT:    ; implicit-def: $vgpr3_vgpr4
 ; DEFAULT-NEXT:    s_waitcnt lgkmcnt(0)
-; DEFAULT-NEXT:    global_load_dwordx2 v[3:4], v5, s[8:9]
+; DEFAULT-NEXT:    global_load_dwordx2 v[1:2], v5, s[8:9]
 ; DEFAULT-NEXT:    s_and_saveexec_b64 s[2:3], vcc
 ; DEFAULT-NEXT:    s_cbranch_execz .LBB9_2
 ; DEFAULT-NEXT:  ; %bb.1: ; %bb.1
-; DEFAULT-NEXT:    global_load_dwordx2 v[1:2], v5, s[10:11]
-; DEFAULT-NEXT:    s_mov_b32 s4, 0
+; DEFAULT-NEXT:    global_load_dwordx2 v[3:4], v5, s[10:11]
 ; DEFAULT-NEXT:    v_cmp_gt_u32_e32 vcc, 7, v0
-; DEFAULT-NEXT:    s_mov_b32 s5, s4
 ; DEFAULT-NEXT:    s_waitcnt vmcnt(1)
-; DEFAULT-NEXT:    v_mov_b32_e32 v3, s4
-; DEFAULT-NEXT:    v_mov_b32_e32 v4, s5
+; DEFAULT-NEXT:    v_mov_b32_e32 v1, 0
 ; DEFAULT-NEXT:    s_andn2_b64 s[0:1], s[0:1], exec
 ; DEFAULT-NEXT:    s_and_b64 s[4:5], vcc, exec
+; DEFAULT-NEXT:    v_mov_b32_e32 v2, v1
 ; DEFAULT-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]
 ; DEFAULT-NEXT:  .LBB9_2: ; %Flow
 ; DEFAULT-NEXT:    s_or_b64 exec, exec, s[2:3]
 ; DEFAULT-NEXT:    s_and_saveexec_b64 s[2:3], s[0:1]
 ; DEFAULT-NEXT:    s_cbranch_execz .LBB9_4
 ; DEFAULT-NEXT:  ; %bb.3: ; %bb.2
 ; DEFAULT-NEXT:    s_waitcnt vmcnt(0)
-; DEFAULT-NEXT:    v_mov_b32_e32 v1, v3
+; DEFAULT-NEXT:    v_mov_b32_e32 v4, v2
 ; DEFAULT-NEXT:    v_mov_b32_e32 v0, 0
-; DEFAULT-NEXT:    v_mov_b32_e32 v2, v4
-; DEFAULT-NEXT:    global_store_dwordx2 v0, v[3:4], s[12:13]
+; DEFAULT-NEXT:    v_mov_b32_e32 v3, v1
+; DEFAULT-NEXT:    global_store_dwordx2 v0, v[1:2], s[12:13]
 ; DEFAULT-NEXT:  .LBB9_4: ; %bb.3
 ; DEFAULT-NEXT:    s_or_b64 exec, exec, s[2:3]
 ; DEFAULT-NEXT:    v_mov_b32_e32 v0, 0
 ; DEFAULT-NEXT:    s_waitcnt vmcnt(0)
-; DEFAULT-NEXT:    global_store_dwordx2 v0, v[1:2], s[14:15]
+; DEFAULT-NEXT:    global_store_dwordx2 v0, v[3:4], s[14:15]
 ; DEFAULT-NEXT:    s_endpgm
 entry:
   %idx = call i32 @llvm.amdgcn.workitem.id.x()
@@ -1279,14 +1275,14 @@ define amdgpu_kernel void @v8i8_phi_const(ptr addrspace(1) %src1, ptr addrspace(
 ; FEATURE-NEXT:    v_cmp_gt_u32_e32 vcc, 7, v0
 ; FEATURE-NEXT:    s_andn2_b64 s[0:1], s[0:1], exec
 ; FEATURE-NEXT:    s_and_b64 s[4:5], vcc, exec
-; FEATURE-NEXT:    v_mov_b32_e32 v1, 1
-; FEATURE-NEXT:    v_mov_b32_e32 v10, 2
-; FEATURE-NEXT:    v_mov_b32_e32 v9, 3
-; FEATURE-NEXT:    v_mov_b32_e32 v8, 4
-; FEATURE-NEXT:    v_mov_b32_e32 v2, 5
-; FEATURE-NEXT:    v_mov_b32_e32 v7, 6
-; FEATURE-NEXT:    v_mov_b32_e32 v6, 7
 ; FEATURE-NEXT:    v_mov_b32_e32 v5, 8
+; FEATURE-NEXT:    v_mov_b32_e32 v6, 7
+; FEATURE-NEXT:    v_mov_b32_e32 v7, 6
+; FEATURE-NEXT:    v_mov_b32_e32 v2, 5
+; FEATURE-NEXT:    v_mov_b32_e32 v8, 4
+; FEATURE-NEXT:    v_mov_b32_e32 v9, 3
+; FEATURE-NEXT:    v_mov_b32_e32 v10, 2
+; FEATURE-NEXT:    v_mov_b32_e32 v1, 1
 ; FEATURE-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]
 ; FEATURE-NEXT:    s_waitcnt vmcnt(0)
 ; FEATURE-NEXT:    v_lshrrev_b32_e32 v16, 24, v4
@@ -1365,14 +1361,14 @@ define amdgpu_kernel void @v8i8_phi_const(ptr addrspace(1) %src1, ptr addrspace(
 ; DEFAULT-NEXT:    v_cmp_gt_u32_e32 vcc, 7, v0
 ; DEFAULT-NEXT:    s_andn2_b64 s[0:1], s[0:1], exec
 ; DEFAULT-NEXT:    s_and_b64 s[4:5], vcc, exec
-; DEFAULT-NEXT:    v_mov_b32_e32 v1, 1
-; DEFAULT-NEXT:    v_mov_b32_e32 v10, 2
-; DEFAULT-NEXT:    v_mov_b32_e32 v9, 3
-; DEFAULT-NEXT:    v_mov_b32_e32 v8, 4
-; DEFAULT-NEXT:    v_mov_b32_e32 v2, 5
-; DEFAULT-NEXT:    v_mov_b32_e32 v7, 6
-; DEFAULT-NEXT:    v_mov_b32_e32 v6, 7
 ; DEFAULT-NEXT:    v_mov_b32_e32 v5, 8
+; DEFAULT-NEXT:    v_mov_b32_e32 v6, 7
+; DEFAULT-NEXT:    v_mov_b32_e32 v7, 6
+; DEFAULT-NEXT:    v_mov_b32_e32 v2, 5
+; DEFAULT-NEXT:    v_mov_b32_e32 v8, 4
+; DEFAULT-NEXT:    v_mov_b32_e32 v9, 3
+; DEFAULT-NEXT:    v_mov_b32_e32 v10, 2
+; DEFAULT-NEXT:    v_mov_b32_e32 v1, 1
 ; DEFAULT-NEXT:    s_or_b64 s[0:1], s[0:1], s[4:5]
 ; DEFAULT-NEXT:    s_waitcnt vmcnt(0)
 ; DEFAULT-NEXT:    v_lshrrev_b32_e32 v16, 24, v4