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[PowerPC] Update DMF VSX ACC data transfer instructions (llvm#138897)
For cpu=future, acc registers no longer overlap VSRs and are prefixed with `dm`. The original, xxmfacc/xxmtacc instructions are now extended menemonics to it's dm* equivalents.
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+28
-22
lines changed

3 files changed

+28
-22
lines changed

‎llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1108,7 +1108,7 @@ bool PPCInstrInfo::isReallyTriviallyReMaterializable(
11081108
case PPC::CRSET:
11091109
case PPC::CRUNSET:
11101110
case PPC::XXSETACCZ:
1111-
case PPC::XXSETACCZW:
1111+
case PPC::DMXXSETACCZ:
11121112
return true;
11131113
}
11141114
return TargetInstrInfo::isReallyTriviallyReMaterializable(MI);

‎llvm/lib/Target/PowerPC/PPCInstrMMA.td

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -551,8 +551,8 @@ let Predicates = [MMA, IsISAFuture], isCodeGenOnly = 1 in {
551551
RegConstraint<"$ATi = $AT">, NoEncode<"$ATi">;
552552

553553
let isAsCheapAsAMove = 1, isReMaterializable = 1 in {
554-
def XXSETACCZW :
555-
XForm_AT3<31, 3, 177, (outs wacc:$AT), (ins), "xxsetaccz $AT",
554+
def DMXXSETACCZ :
555+
XForm_AT3<31, 3, 177, (outs wacc:$AT), (ins), "dmxxsetaccz $AT",
556556
IIC_VecGeneral, [(set v512i1:$AT, (int_ppc_mma_xxsetaccz))]>;
557557
}
558558

@@ -572,6 +572,12 @@ let Predicates = [MMA, IsISAFuture], isCodeGenOnly = 1 in {
572572
}
573573
}
574574

575+
let Predicates = [MMA, IsISAFuture] in {
576+
def : InstAlias<"dmxxmmfacc $AT ", (XXMFACC acc:$AT)>;
577+
def : InstAlias<"dmxxmmtacc $AT ", (XXMTACC acc:$AT)>;
578+
def : InstAlias<"dmxxsetaccz $AT ", (XXSETACCZ acc:$AT)>;
579+
}
580+
575581
let Predicates = [MMA, PrefixInstrs, IsNotISAFuture] in {
576582
def PMXVI8GER4SPP :
577583
MMIRR_XX3Form_XYP4_XAB6<59, 99, (outs acc:$AT),
@@ -1093,5 +1099,5 @@ let Predicates = [MMA, IsISAFuture] in {
10931099
def : Pat<(v512i1 (int_ppc_mma_assemble_acc v16i8:$vs1, v16i8:$vs0,
10941100
v16i8:$vs3, v16i8:$vs2)),
10951101
(DMXXINSTDMR512 ConcatsMMA.VecsToVecPair0, ConcatsMMA.VecsToVecPair1)>;
1096-
def : Pat<(v512i1 immAllZerosV), (XXSETACCZW)>;
1102+
def : Pat<(v512i1 immAllZerosV), (DMXXSETACCZ)>;
10971103
}

‎llvm/test/CodeGen/PowerPC/mmaplus-intrinsics.ll

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -769,7 +769,7 @@ declare <512 x i1> @llvm.ppc.mma.xxsetaccz()
769769
define void @int_xxsetaccz(ptr %ptr) {
770770
; CHECK-LABEL: int_xxsetaccz:
771771
; CHECK: # %bb.0: # %entry
772-
; CHECK-NEXT: xxsetaccz wacc0
772+
; CHECK-NEXT: dmxxsetaccz wacc0
773773
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
774774
; CHECK-NEXT: stxv v4, 48(r3)
775775
; CHECK-NEXT: stxv v5, 32(r3)
@@ -779,7 +779,7 @@ define void @int_xxsetaccz(ptr %ptr) {
779779
;
780780
; CHECK-BE-LABEL: int_xxsetaccz:
781781
; CHECK-BE: # %bb.0: # %entry
782-
; CHECK-BE-NEXT: xxsetaccz wacc0
782+
; CHECK-BE-NEXT: dmxxsetaccz wacc0
783783
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
784784
; CHECK-BE-NEXT: stxv v5, 48(r3)
785785
; CHECK-BE-NEXT: stxv v4, 32(r3)
@@ -789,7 +789,7 @@ define void @int_xxsetaccz(ptr %ptr) {
789789
;
790790
; CHECK-O0-LABEL: int_xxsetaccz:
791791
; CHECK-O0: # %bb.0: # %entry
792-
; CHECK-O0-NEXT: xxsetaccz wacc0
792+
; CHECK-O0-NEXT: dmxxsetaccz wacc0
793793
; CHECK-O0-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
794794
; CHECK-O0-NEXT: xxlor vs0, v4, v4
795795
; CHECK-O0-NEXT: stxv vs0, 48(r3)
@@ -803,7 +803,7 @@ define void @int_xxsetaccz(ptr %ptr) {
803803
;
804804
; CHECK-O0-BE-LABEL: int_xxsetaccz:
805805
; CHECK-O0-BE: # %bb.0: # %entry
806-
; CHECK-O0-BE-NEXT: xxsetaccz wacc0
806+
; CHECK-O0-BE-NEXT: dmxxsetaccz wacc0
807807
; CHECK-O0-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
808808
; CHECK-O0-BE-NEXT: xxlor vs0, v5, v5
809809
; CHECK-O0-BE-NEXT: stxv vs0, 48(r3)
@@ -817,7 +817,7 @@ define void @int_xxsetaccz(ptr %ptr) {
817817
;
818818
; CHECK-AIX64-LABEL: int_xxsetaccz:
819819
; CHECK-AIX64: # %bb.0: # %entry
820-
; CHECK-AIX64-NEXT: xxsetaccz 0
820+
; CHECK-AIX64-NEXT: dmxxsetaccz 0
821821
; CHECK-AIX64-NEXT: dmxxextfdmr512 34, 36, 0, 0
822822
; CHECK-AIX64-NEXT: stxv 5, 48(3)
823823
; CHECK-AIX64-NEXT: stxv 4, 32(3)
@@ -827,7 +827,7 @@ define void @int_xxsetaccz(ptr %ptr) {
827827
;
828828
; CHECK-AIX32-LABEL: int_xxsetaccz:
829829
; CHECK-AIX32: # %bb.0: # %entry
830-
; CHECK-AIX32-NEXT: xxsetaccz 0
830+
; CHECK-AIX32-NEXT: dmxxsetaccz 0
831831
; CHECK-AIX32-NEXT: dmxxextfdmr512 34, 36, 0, 0
832832
; CHECK-AIX32-NEXT: stxv 5, 48(3)
833833
; CHECK-AIX32-NEXT: stxv 4, 32(3)
@@ -845,7 +845,7 @@ declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble
845845
define void @disass_acc(ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr %ptr4) {
846846
; CHECK-LABEL: disass_acc:
847847
; CHECK: # %bb.0: # %entry
848-
; CHECK-NEXT: xxsetaccz wacc0
848+
; CHECK-NEXT: dmxxsetaccz wacc0
849849
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
850850
; CHECK-NEXT: stxv v5, 0(r3)
851851
; CHECK-NEXT: stxv v4, 0(r4)
@@ -855,7 +855,7 @@ define void @disass_acc(ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr %ptr4) {
855855
;
856856
; CHECK-BE-LABEL: disass_acc:
857857
; CHECK-BE: # %bb.0: # %entry
858-
; CHECK-BE-NEXT: xxsetaccz wacc0
858+
; CHECK-BE-NEXT: dmxxsetaccz wacc0
859859
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
860860
; CHECK-BE-NEXT: stxv v2, 0(r3)
861861
; CHECK-BE-NEXT: stxv v3, 0(r4)
@@ -865,7 +865,7 @@ define void @disass_acc(ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr %ptr4) {
865865
;
866866
; CHECK-O0-LABEL: disass_acc:
867867
; CHECK-O0: # %bb.0: # %entry
868-
; CHECK-O0-NEXT: xxsetaccz wacc0
868+
; CHECK-O0-NEXT: dmxxsetaccz wacc0
869869
; CHECK-O0-NEXT: dmxxextfdmr512 vsp32, vsp36, wacc0, 0
870870
; CHECK-O0-NEXT: vmr v2, v0
871871
; CHECK-O0-NEXT: xxlor vs0, v1, v1
@@ -879,7 +879,7 @@ define void @disass_acc(ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr %ptr4) {
879879
;
880880
; CHECK-O0-BE-LABEL: disass_acc:
881881
; CHECK-O0-BE: # %bb.0: # %entry
882-
; CHECK-O0-BE-NEXT: xxsetaccz wacc0
882+
; CHECK-O0-BE-NEXT: dmxxsetaccz wacc0
883883
; CHECK-O0-BE-NEXT: dmxxextfdmr512 vsp36, vsp32, wacc0, 0
884884
; CHECK-O0-BE-NEXT: vmr v2, v1
885885
; CHECK-O0-BE-NEXT: xxlor vs0, v0, v0
@@ -893,7 +893,7 @@ define void @disass_acc(ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr %ptr4) {
893893
;
894894
; CHECK-AIX64-LABEL: disass_acc:
895895
; CHECK-AIX64: # %bb.0: # %entry
896-
; CHECK-AIX64-NEXT: xxsetaccz 0
896+
; CHECK-AIX64-NEXT: dmxxsetaccz 0
897897
; CHECK-AIX64-NEXT: dmxxextfdmr512 34, 36, 0, 0
898898
; CHECK-AIX64-NEXT: stxv 2, 0(3)
899899
; CHECK-AIX64-NEXT: stxv 3, 0(4)
@@ -903,7 +903,7 @@ define void @disass_acc(ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr %ptr4) {
903903
;
904904
; CHECK-AIX32-LABEL: disass_acc:
905905
; CHECK-AIX32: # %bb.0: # %entry
906-
; CHECK-AIX32-NEXT: xxsetaccz 0
906+
; CHECK-AIX32-NEXT: dmxxsetaccz 0
907907
; CHECK-AIX32-NEXT: dmxxextfdmr512 34, 36, 0, 0
908908
; CHECK-AIX32-NEXT: stxv 2, 0(3)
909909
; CHECK-AIX32-NEXT: stxv 3, 0(4)
@@ -931,7 +931,7 @@ declare <512 x i1> @llvm.ppc.mma.xvf32gernp(<512 x i1>, <16 x i8>, <16 x i8>)
931931
define void @testcse(ptr %res, <16 x i8> %vc) {
932932
; CHECK-LABEL: testcse:
933933
; CHECK: # %bb.0: # %entry
934-
; CHECK-NEXT: xxsetaccz wacc0
934+
; CHECK-NEXT: dmxxsetaccz wacc0
935935
; CHECK-NEXT: xvf32gerpp wacc0, v2, v2
936936
; CHECK-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
937937
; CHECK-NEXT: stxv v4, 48(r3)
@@ -946,7 +946,7 @@ define void @testcse(ptr %res, <16 x i8> %vc) {
946946
;
947947
; CHECK-BE-LABEL: testcse:
948948
; CHECK-BE: # %bb.0: # %entry
949-
; CHECK-BE-NEXT: xxsetaccz wacc0
949+
; CHECK-BE-NEXT: dmxxsetaccz wacc0
950950
; CHECK-BE-NEXT: xvf32gerpp wacc0, v2, v2
951951
; CHECK-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
952952
; CHECK-BE-NEXT: stxv v5, 48(r3)
@@ -961,7 +961,7 @@ define void @testcse(ptr %res, <16 x i8> %vc) {
961961
;
962962
; CHECK-O0-LABEL: testcse:
963963
; CHECK-O0: # %bb.0: # %entry
964-
; CHECK-O0-NEXT: xxsetaccz wacc0
964+
; CHECK-O0-NEXT: dmxxsetaccz wacc0
965965
; CHECK-O0-NEXT: xvf32gerpp wacc0, v2, v2
966966
; CHECK-O0-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
967967
; CHECK-O0-NEXT: xxlor vs3, v4, v4
@@ -980,7 +980,7 @@ define void @testcse(ptr %res, <16 x i8> %vc) {
980980
;
981981
; CHECK-O0-BE-LABEL: testcse:
982982
; CHECK-O0-BE: # %bb.0: # %entry
983-
; CHECK-O0-BE-NEXT: xxsetaccz wacc0
983+
; CHECK-O0-BE-NEXT: dmxxsetaccz wacc0
984984
; CHECK-O0-BE-NEXT: xvf32gerpp wacc0, v2, v2
985985
; CHECK-O0-BE-NEXT: dmxxextfdmr512 vsp34, vsp36, wacc0, 0
986986
; CHECK-O0-BE-NEXT: xxlor vs3, v5, v5
@@ -999,7 +999,7 @@ define void @testcse(ptr %res, <16 x i8> %vc) {
999999
;
10001000
; CHECK-AIX64-LABEL: testcse:
10011001
; CHECK-AIX64: # %bb.0: # %entry
1002-
; CHECK-AIX64-NEXT: xxsetaccz 0
1002+
; CHECK-AIX64-NEXT: dmxxsetaccz 0
10031003
; CHECK-AIX64-NEXT: xvf32gerpp 0, 2, 2
10041004
; CHECK-AIX64-NEXT: dmxxextfdmr512 34, 36, 0, 0
10051005
; CHECK-AIX64-NEXT: stxv 5, 48(3)
@@ -1014,7 +1014,7 @@ define void @testcse(ptr %res, <16 x i8> %vc) {
10141014
;
10151015
; CHECK-AIX32-LABEL: testcse:
10161016
; CHECK-AIX32: # %bb.0: # %entry
1017-
; CHECK-AIX32-NEXT: xxsetaccz 0
1017+
; CHECK-AIX32-NEXT: dmxxsetaccz 0
10181018
; CHECK-AIX32-NEXT: xvf32gerpp 0, 2, 2
10191019
; CHECK-AIX32-NEXT: dmxxextfdmr512 34, 36, 0, 0
10201020
; CHECK-AIX32-NEXT: stxv 5, 48(3)

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