Add compiler definition files

The behavior for each compiler is defined in a separate TOML file to improve
readability and maintainability.

Signed-off-by: John Pennycook <john.pennycook@intel.com>

Author: Pennycook

MANIFEST.in

@@ -1,3 +1,7 @@
+include codebasin/compilers/clang.toml
+include codebasin/compilers/gnu.toml
+include codebasin/compilers/intel.toml
+include codebasin/compilers/nvidia.toml
 include codebasin/schema/analysis.schema
 include codebasin/schema/compilation-database.schema
 include codebasin/schema/coverage.schema

codebasin/compilers/clang.toml

@@ -0,0 +1,20 @@
+[compiler.clang]
+
+[compiler."clang++"]
+alias_of = "clang"
+
+[[compiler.clang.parser]]
+flags = ["-fopenmp"]
+action = "append_const"
+dest = "modes"
+const = "openmp"
+
+[[compiler.clang.parser]]
+flags = ["-fsycl-is-device"]
+action = "append_const"
+dest = "defines"
+const = "__SYCL_DEVICE_ONLY__"
+
+[[compiler.clang.modes]]
+name = "openmp"
+defines = ["_OPENMP"]

codebasin/compilers/gnu.toml

@@ -0,0 +1,14 @@
+[compiler.gcc]
+
+[compiler."g++"]
+alias_of = "gcc"
+
+[[compiler.gcc.parser]]
+flags = ["-fopenmp"]
+action = "append_const"
+dest = "modes"
+const = "openmp"
+
+[[compiler.gcc.modes]]
+name = "openmp"
+defines = ["_OPENMP"]

codebasin/compilers/intel.toml

@@ -0,0 +1,52 @@
+[compiler.icx]
+
+[compiler.icpx]
+alias_of = "icx"
+
+[[compiler.icx.parser]]
+flags = ["-fopenmp"]
+action = "append_const"
+dest = "modes"
+const = "openmp"
+
+[[compiler.icx.parser]]
+flags = ["-fsycl"]
+action = "append_const"
+dest = "modes"
+const = "sycl"
+
+[[compiler.icx.parser]]
+flags = ["-fsycl-targets"]
+action = "store_split"
+sep = ","
+format = "sycl-$value"
+dest = "passes"
+default = ["sycl-spir64"]
+
+[[compiler.icx.modes]]
+name = "sycl"
+defines = ["SYCL_LANGUAGE_VERSION"]
+
+[[compiler.icx.modes]]
+name = "openmp"
+defines = ["_OPENMP"]
+
+[[compiler.icx.passes]]
+name = "sycl-spir64"
+defines = ["__SYCL_DEVICE_ONLY__", "__SPIR__", "__SPIRV__"]
+modes = ["sycl"]
+
+[[compiler.icx.passes]]
+name = "sycl-spir64_x86_64"
+defines = ["__SYCL_DEVICE_ONLY__", "__SPIR__", "__SPIRV__"]
+modes = ["sycl"]
+
+[[compiler.icx.passes]]
+name = "sycl-spir64_gen"
+defines = ["__SYCL_DEVICE_ONLY__", "__SPIR__", "__SPIRV__"]
+modes = ["sycl"]
+
+[[compiler.icx.passes]]
+name = "sycl-spir64_fpga"
+defines = ["__SYCL_DEVICE_ONLY__", "__SPIR__", "__SPIRV__"]
+modes = ["sycl"]

codebasin/compilers/nvidia.toml

@@ -0,0 +1,41 @@
+[compiler.nvcc]
+options = ["-D__NVCC__", "-D__CUDACC__"]
+
+[[compiler.nvcc.parser]]
+flags = ["-fopenmp"]
+action = "append_const"
+dest = "modes"
+const = "openmp"
+
+[[compiler.nvcc.parser]]
+flags = ["--gpu-architecture", "--gpu-code", "-gencode"]
+action = "extend_match"
+pattern = '(?:sm_|compute_)(\d+)'
+format = "sm_$value"
+dest = "passes"
+default = ["sm_70"]
+override = true
+
+[[compiler.nvcc.modes]]
+name = "openmp"
+defines = ["_OPENMP"]
+
+[[compiler.nvcc.passes]]
+name = "sm_70"
+defines = ["__CUDA_ARCH__=700"]
+
+[[compiler.nvcc.passes]]
+name = "sm_75"
+defines = ["__CUDA_ARCH__=750"]
+
+[[compiler.nvcc.passes]]
+name = "sm_80"
+defines = ["__CUDA_ARCH__=800"]
+
+[[compiler.nvcc.passes]]
+name = "sm_89"
+defines = ["__CUDA_ARCH__=890"]
+
+[[compiler.nvcc.passes]]
+name = "sm_90"
+defines = ["__CUDA_ARCH__=900"]