Current Status

DVB-S2 Tx -- current status

Leveraging existing GNU Radio work to generate test vectors
Core logic 90% completed
- Baseband scrambler
- BCH encoder
- Bit interleaver
- Constellation mapper
- LDPC Encoder
- Physical layer framing
- Modulation still WIP
Using industry standard AXI streaming
Each module tested individually for all relevant DVB-S2 base spec parameters (+ AXI streaming specifics), for a total of more than 1100 tests
Continuous integration using open source tools
- GHDL for VHDL simulation
- VUnit for unit testing support
- Yosys for RTL synthesis
- Ensures code is both functionally correct and synthesis friendly
Light on resources. Resource usage using Xilinx's XC7Z007S as reference:

Resource Utilization Utilization %

LUT ~4,9k 34%

LUTRAM 222 4%

FF ~3k 11%

BRAM 20 (~90 kB) 41%


DVB-S2 Tx block diagram