Skip to content

Commit 24b5cca

Browse files
authored
Merge pull request #4202 from TiborGY/inlines_pt2
Remove some unused inline macro definitions
2 parents f66e6d3 + 815cb24 commit 24b5cca

File tree

9 files changed

+1
-20
lines changed

9 files changed

+1
-20
lines changed

common_arm.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -47,8 +47,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4747

4848
#endif
4949

50-
#define INLINE inline
51-
5250
#define RETURN_BY_COMPLEX
5351

5452
#ifndef ASSEMBLER

common_arm64.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -44,8 +44,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4444
#define RMB __asm__ __volatile__ ("dmb ishld" : : : "memory")
4545
#endif
4646

47-
#define INLINE inline
48-
4947
#if defined( F_INTERFACE_FLANG) || defined(F_INTERFACE_PGI)
5048
#define RETURN_BY_STACK
5149
#else

common_e2k.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4141
#define WMB do { __asm__ __volatile__("": : :"memory"); } while (0)
4242
#define RMB
4343

44-
#define INLINE __attribute__((__always_inline__)) inline
45-
4644
static inline int blas_quickdivide(blasint x, blasint y) {
4745
return x / y;
4846
}

common_loongarch64.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -75,8 +75,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
7575
#define WMB __sync_synchronize()
7676
#define RMB __sync_synchronize()
7777

78-
#define INLINE inline
79-
8078
#ifndef ASSEMBLER
8179

8280
static inline int blas_quickdivide(blasint x, blasint y){

common_mips.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -37,8 +37,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3737
#define WMB __sync_synchronize()
3838
#define RMB __sync_synchronize()
3939

40-
#define INLINE inline
41-
4240
#define RETURN_BY_COMPLEX
4341

4442
#ifndef ASSEMBLER

common_mips64.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -75,8 +75,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
7575
#define WMB __sync_synchronize()
7676
#define RMB __sync_synchronize()
7777

78-
#define INLINE inline
79-
8078
#ifndef ASSEMBLER
8179

8280
static inline unsigned int rpcc(void){

common_power.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -78,8 +78,6 @@
7878
#define RMB __asm__ __volatile__ ("sync")
7979
#endif
8080

81-
#define INLINE inline
82-
8381
#ifdef PPC440
8482
#define STDERR stdout
8583
#define QNONCACHE 0x1
@@ -91,7 +89,7 @@
9189

9290
void *qalloc(int flags, size_t bytes);
9391

94-
static INLINE void blas_lock(volatile unsigned long *address){
92+
static inline void blas_lock(volatile unsigned long *address){
9593

9694
long int ret, val = 1;
9795

common_riscv64.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -75,8 +75,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
7575
#define WMB __sync_synchronize()
7676
#define RMB __sync_synchronize()
7777

78-
#define INLINE inline
79-
8078
#ifndef ASSEMBLER
8179

8280

common_zarch.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -37,9 +37,6 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3737
#define WMB
3838
#define RMB
3939

40-
41-
#define INLINE inline
42-
4340
#define RETURN_BY_COMPLEX
4441

4542
#ifndef ASSEMBLER

0 commit comments

Comments
 (0)