Merge pull request #3919 from sergei-lewis/risc-v-latest-rvv-intrinsics

update riscv intrinsics for latest spec

Author: xianyi

common_riscv64.h

@@ -91,12 +91,15 @@ static inline int blas_quickdivide(blasint x, blasint y){
 #define BUFFER_SIZE     ( 32 << 20)
 #define SEEK_ADDRESS
 
-#if defined(C910V)
-#include <riscv_vector.h>
-#endif
-
-#if defined(x280)
-#include <riscv_vector.h>
+#if defined(C910V) || defined(RISCV64_ZVL256B) || defined(__riscv_v)
+# include <riscv_vector.h>
+# if !defined(DOUBLE)
+#  define EXTRACT_FLOAT(v) __riscv_vfmv_f_s_f32m1_f32(v)
+# else
+#  define EXTRACT_FLOAT(v) __riscv_vfmv_f_s_f64m1_f64(v)
+# endif
+#else
+# define EXTRACT_FLOAT(v) (v[0])
 #endif
 
 #endif

cpuid_riscv64.c

@@ -70,14 +70,14 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 /* or implied, of The University of Texas at Austin.                 */
 /*********************************************************************/
 
-#define CPU_GENERIC   0
-#define CPU_C910V     1
-#define CPU_x280        2
+#define CPU_GENERIC         0
+#define CPU_C910V           1
+#define CPU_RISCV64_ZVL256B 2
 
 static char *cpuname[] = {
   "RISCV64_GENERIC",
-  "C910V"
-  "x280"
+  "C910V",
+  "CPU_RISCV64_ZVL256B"
 };
 
 int detect(void){