Skip to content

Commit 1dfc4e6

Browse files
author
Nursultan Zarlyk
committed
Replace with ARM64 intrinsics
1 parent 1bb7993 commit 1dfc4e6

File tree

1 file changed

+9
-4
lines changed

1 file changed

+9
-4
lines changed

common_arm64.h

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -35,9 +35,9 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3535

3636
#ifdef C_MSVC
3737
#include <intrin.h>
38-
#define MB do {} while (0)
39-
#define WMB do {} while (0)
40-
#define RMB
38+
#define MB __dmb(_ARM64_BARRIER_ISH)
39+
#define WMB __dmb(_ARM64_BARRIER_ISHST)
40+
#define RMB __dmb(_ARM64_BARRIER_ISHLD)
4141
#else
4242
#define MB __asm__ __volatile__ ("dmb ish" : : : "memory")
4343
#define WMB __asm__ __volatile__ ("dmb ishst" : : : "memory")
@@ -92,7 +92,12 @@ static void __inline blas_lock(volatile BLASULONG *address){
9292
#if !defined(OS_DARWIN) && !defined (OS_ANDROID)
9393
static __inline BLASULONG rpcc(void){
9494
#ifdef C_MSVC
95-
return __rdtsc();
95+
const int64_t pmccntr_el0 = (((3 & 1) << 14) | // op0
96+
((3 & 7) << 11) | // op1
97+
((9 & 15) << 7) | // crn
98+
((13 & 15) << 3) | // crm
99+
((0 & 7) << 0)); // op2
100+
return _ReadStatusReg(pmccntr_el0);
96101
#else
97102
BLASULONG ret = 0;
98103
blasint shift;

0 commit comments

Comments
 (0)