Skip to content

Commit ca35801

Browse files
Merge pull request #21 from MicrochipTech/rc2024_2
Update of SmartHLS libraries for Libero/SmartHLS 2024.2 release
2 parents a076a15 + c7b40ca commit ca35801

File tree

244 files changed

+17251
-1319
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

244 files changed

+17251
-1319
lines changed

.gitignore

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
**/hls_output
2+
.vscode
3+
**/riscv_tests/master_example/discovery_kit/work
4+
**/riscv_tests/master_example/**/component
5+
**/riscv_tests/sin_performance/discovery_kit/work
6+
**/riscv_tests/sin_performance/**/component
7+
**/__pycache__
8+
**/math/**/master_example/build
9+
**/math/examples/**/*_reports
10+
vision/demo_designs/PF_Video_kit/libero/vision_pipeline
11+
vision/demo_designs/PF_Video_kit/libero/component

.gitmodules

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,9 @@
11
[submodule "support/miv/platform"]
22
path = support/miv/platform
33
url = https://github.com/Mi-V-Soft-RISC-V/platform.git
4+
[submodule "support/beaglev-fire/gateware"]
5+
path = support/beaglev-fire/gateware
6+
url = https://openbeagle.org/jennifermah76/gateware.git
7+
[submodule "support/discovery_kit/polarfire-soc-discovery-kit-reference-design"]
8+
path = support/discovery_kit/polarfire-soc-discovery-kit-reference-design
9+
url = git@github.com:ManuelSaldana/polarfire-soc-discovery-kit-reference-design.git

README.md

Lines changed: 20 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,17 @@
11
# Microchip SmartHLS Libraries
22

3-
Microchip currently provides two open source libraries that complement and expand the functionality of the SmartHLS tool: the [SmartHLS Vision Library](vision), and the [SmartHLS Fixed-Point Math Library](math). These libraries are currently in active development. To use the libraries, you should first install the SmartHLS tool, which is part of the [Libero SoC Design Suite](https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/fpga/libero-software-later-versions).
4-
5-
`Note: This release of the library is designed to work on the latest Libero SoC Design Suite version, 2024.1, and may not be compatible with previous versions of Libero and SmartHLS.`
3+
Microchip provides open source libraries that complement and expand the functionality of the SmartHLS tool. Currently, the available libraries are:
64

7-
A stable copy of the libraries is included with the SmartHLS installer under the `<PATH TO SMARTHLS INSTALLATION>/SmartHLS/smarthls-library/external` directory. The snapshot of the library is taken at the time when SmartHLS is released, while the Github version can include bug fixes and new functionality that may not be present in the installed copy.
5+
- [SmartHLS Vision Library](vision)
6+
- [SmartHLS Fixed-Point Math Library](math)
7+
- [SmartHLS DSP Library](dsp)
8+
9+
These libraries are currently in active development therefore expect changes in their definition and functionality included. To use the libraries, you should first install the SmartHLS tool, which is part of the [Libero SoC Design Suite](https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/fpga/libero-software-later-versions).
10+
11+
**NOTEs**:
12+
13+
- The main branch of the library repo is designed to work on the latest Libero SoC Design Suite version, and may not be compatible with previous versions of Libero and SmartHLS. Check the [releases](https://github.com/MicrochipTech/fpga-hls-libraries/releases) page for older versions.
14+
- A stable copy of the libraries is included with the SmartHLS installer under the `<PATH TO SMARTHLS INSTALLATION>/SmartHLS/smarthls-library/external` directory. The snapshot of the library is taken at the time when SmartHLS is released, while the GitHub version can include bug fixes and new functionality that may not be present in the installed copy.
815

916
## Setup
1017

@@ -19,15 +26,16 @@ To use the latest version of the library, users should clone the library from Mi
1926
This is because Windows OS has a 256-character path length limit.
2027
Some files generated by Libero project deep down under the repository's directory structure can go over the path limit.
2128
- Here are the commands:
29+
2230
```console
23-
> cd <DIRECTORY TO CLONE THE LIBRARY INTO>
24-
> git lfs install
25-
> git clone --recurse-submodules https://github.com/MicrochipTech/fpga-hls-libraries.git
26-
> git lfs pull
31+
cd <DIRECTORY TO CLONE THE LIBRARY INTO>
32+
git lfs install
33+
git clone --recurse-submodules https://github.com/MicrochipTech/fpga-hls-libraries.git
34+
git lfs pull
2735
```
28-
36+
2937
- Next, update any existing designs that use the libraries to include the path where the libraries have been cloned. This can be done by adding `USER_CXX_FLAG+=-I/path/to/cloned/library` to your Makefile.
3038

31-
- If you would like to use the vision library, after clonning the repository please make sure to setup the **OpenCV** and **FFMPEG** pre-compiled libraries first as described in this link: [vision/precompiled_sw_libraries](vision/precompiled_sw_libraries).
32-
- These libraries are also included with the latest release of SmartHLS, under `<PATH TO SMARTHLS INSTALLATION>/SmartHLS/smarthls-library/external/vision/precompiled_sw_libraries`.
33-
39+
- If you would like to use the vision library, after clonning the repository please make sure to setup the **OpenCV** and **FFMPEG** pre-compiled libraries first as described in this link: [vision/precompiled_sw_libraries](vision/precompiled_sw_libraries).
40+
41+
- These libraries are also included with the latest release of SmartHLS, under `<PATH TO SMARTHLS INSTALLATION>/SmartHLS/smarthls-library/external/vision/precompiled_sw_libraries`.

dsp/README.md

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
# SmartHLS DSP Library
2+
3+
<!-- TOC -->
4+
5+
- [SmartHLS DSP Library](#smarthls-dsp-library)
6+
- [Overview](#overview)
7+
- [Directory structure](#directory-structure)
8+
- [Functions](#functions)
9+
10+
<!-- /TOC -->
11+
## Overview
12+
13+
The SmartHLS DSP includes C++ functions that facilitate the rapid development of applications that require common DSP functionality. Applications developed using the SmartHLS DSP library can be seamlessly ported across various Microchip FPGA platforms, significantly reducing time to market.
14+
15+
By open-sourcing the DSP library, we aim to introduce new features and fixes more rapidly and provide the source code as a reference for developers working on other HLS designs. We encourage all developers to contribute by reporting issues, providing feedback, and submitting feature requests through the "Issues" section. Additionally, we welcome contributions of new algorithms and fixes to enhance this open-source repository.
16+
17+
## Directory structure
18+
19+
Below is the directory structure of the DSP library and each sub-directory's respective content.
20+
Please see the readme files in sub-directories for more details.
21+
22+
- [docs](./docs/): Documentation for the DSP HLS C++ Library.
23+
- [graphs](./docs/graphs/): Graphs that are used in .md files
24+
- [md](./docs/md/): folder containing .md files for each DSP function.
25+
- [include](include/): The header files of the DSP HLS C++ library.
26+
- [utils](utils/): Python scripts that are used for various purposes.
27+
- [examples](examples/): Examples showcasing the usage of the DSP HLS C++ library
28+
- [riscv_tests](./examples/riscv_tests/): Directory containing examples using the RISC-V CPUs and FPGA fabric for different boards.
29+
- [fft_demo](./examples/riscv_tests/fft_demo/): Directory containing the FFT demo for different boards.
30+
- [icicle_kit](./examples/riscv_tests/fft_demo/icicle_kit/): Project files for the Icicle Kit
31+
- [discovery_kit](./examples/riscv_tests/fft_demo/discovery_kit/): Project files for the Discovery kit.
32+
- [beaglev_fire](./examples/riscv_tests/fft_demo/beaglev_fire/): Project files for the BeagleV-Fire board.
33+
- [simple](./examples/simple/): Directory containing test programs for each DSP function.
34+
- [fft](./examples/simple/fft/): Simple test program for FFT
35+
36+
## Functions
37+
38+
| Function | Description |
39+
|--------------------------------------|--------------------------------------------------|
40+
| [fft](docs/md/fft.md) | Radix 2, 256 samples, in-place FFT |

dsp/docs/graphs/fft_test10_graph.png

269 KB
Loading

dsp/docs/graphs/fft_test3_graph.png

241 KB
Loading

dsp/docs/graphs/fft_test4_graph.png

224 KB
Loading
38.6 KB
Loading

dsp/docs/inplace_fft.json

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
{ "signal" : [
2+
{ "name": "clk", "wave": "p.......|............|......." },
3+
{ "name": "start", "wave": "010.....|.....10.....|.......", "node" : ".j............k"},
4+
{ "name": "ready", "wave": "010.....|.....10.....|......."},
5+
{ "name": "finish", "wave": "0.......|.....10.....|.....10", "node": '..............b............d'},
6+
{ "name": "in_en", "wave": "0..1...0|.......1...0|......."},
7+
{ "name": "in_data", "wave": "x..==22x|.......==22x|.......", "data":["a0", "a1", "...", "an-1","b0", "b1", "...", "bn-1"]},
8+
{ "name": "out_en", "wave": "0.......|1...0.......|1...0..", "node": '.............a............c'},
9+
{ "name": "out_data", "wave": "x.......|====x.......|====x..", "data":["A0", "A1", "...", "An-1", "B0", "B1", "...", "Bn-1"]},
10+
{ "node": '.l............m' },
11+
],
12+
"edge": ['a-~>b', 'c-~>d', 'j-l', 'k-m', 'l<->m Call Latency'],
13+
"head": {
14+
"text": "In-place FFT"
15+
}
16+
}

dsp/docs/md/fft.md

Lines changed: 83 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,83 @@
1+
## [`fft`](../../include/hls_fft.hpp)
2+
3+
## Table of Contents:
4+
5+
**Functions**
6+
7+
> [`inplace_fft`](#function-inplace_fft)
8+
9+
**Examples**
10+
11+
> [Examples](#examples)
12+
13+
**Quality of Results**
14+
15+
> [Error Graph](#error-graph)
16+
17+
> [Resource Usage](#resource-usage)
18+
19+
### Function `fft`
20+
~~~lua
21+
template <unsigned SIZE>
22+
void fft(hls::FIFO<fft_data_t>& fifo_in, hls::FIFO<fft_data_t>& fifo_out)
23+
~~~
24+
25+
Compute the FFT. Note that fft_data_t type is defined as:
26+
```cpp
27+
struct fft_data_t {
28+
ap_int<16> im;
29+
ap_int<16> re;
30+
};
31+
```
32+
![timing_diagram](../graphs/in-place-fft-timing.PNG)
33+
34+
35+
**Template Parameters:**
36+
37+
* `unsigned SIZE`: the FFT transform size<br>
38+
39+
**Function Arguments:**
40+
41+
* `hls::FIFO<fft_data_t>& fifo_in`: reference to the input fifo, where the depth must match the FFT size<br>
42+
* `hls::FIFO<fft_data_t>& fifo_out`: reference to the output fifo, where the depth must match the FFT size<br>
43+
44+
**Limitations:**
45+
46+
* The fft function currently only supports the radix-2, 256-point, forward inplace FFT implementation.
47+
48+
**Returns:**
49+
50+
No return.
51+
52+
## Examples
53+
54+
~~~lua
55+
hls::dsp::fft<SIZE>(fifo_in, fifo_out);
56+
~~~
57+
58+
The example used to gather the following graph and resource report can be found [here](../../examples/simple/fft).
59+
60+
## Error Graph
61+
62+
![fft_test10](<../graphs/fft_test10_graph.png>)
63+
64+
![fft_test3](<../graphs/fft_test3_graph.png>)
65+
66+
![fft_test4](<../graphs/fft_test4_graph.png>)
67+
68+
## Resource Usage
69+
70+
Using MPF300
71+
72+
Size:256_Radix:2_forward_inplace
73+
74+
75+
| Name | Latency [cycles] (min/max/avg) | II [cycles] (min/max/avg) | Real Avg Error | Real Max Error | Imaginary Avg Error | Imaginary Max Error | LUTs | DFFs | DSPs | LSRAM | uSRAM | Estimated Frequency |
76+
|-------------|----------------------------------|-----------------------------|------------------|------------------|-----------------------|-----------------------|--------|--------|--------|---------|---------|-----------------------|
77+
| inplace_fft | 2,718 / 2,718 / 2,718.00 | 2,718 / 2,718 / 2,718.00 | 1.15234 | 4 | 1.0625 | 4 | 2387 | 2412 | 6 | 4 | 0 | 259.673 MHz |
78+
79+
Notes:
80+
- Targeted FMax was 400MHz.
81+
82+
83+
Back to [top](#).
Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
NAME = shls_test
2+
LOCAL_CONFIG = -legup-config=config.tcl
3+
SRCS = ../sources/demo.cpp
4+
5+
# Root directory path for the HLS libraries. Modify as necessary.
6+
SHLS_LIBRARY_DIR = ../../../../..
7+
8+
USER_CXX_FLAG += -I$(SHLS_LIBRARY_DIR)/dsp/include
9+
USER_CXX_FLAG += -O3 -pg -Wall -Wno-strict-aliasing -Wno-unused-label -Wno-unknown-pragmas -Wno-attributes
10+
USER_CXX_FLAG += -I$(SHLS_ROOT_DIR)/smarthls-library
11+
12+
# BeagleV-Fire board only supports HLS_ALLOC_NONCACHED
13+
USER_CXX_FLAG += -DDDR_REGION=HLS_ALLOC_NONCACHED
14+
15+
# AXI_TYPE: available options are:
16+
# - AXI_TARGET
17+
# - AXI_INITIATOR (default)
18+
# USER_CXX_FLAG += -DAXI_TARGET

math/examples/riscv_tests/sin_performance/beaglev_fire/hls/config.tcl renamed to dsp/examples/riscv_tests/fft_demo/beaglev_fire/config.tcl

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,11 @@
11
source $env(SHLS_ROOT_DIR)/examples/legup.tcl
22
set_project PolarFireSoC MPFS025T-FCVG484E Icicle_SoC
33
set_parameter POINTSTO_ANALYZE_HW_ONLY 1
4+
set_parameter SOC_POLL_DELAY 1
45

56
#
67
# Parameters used for SoC integration
78
#
8-
## Note that SOC_BD_NAME must match the top_level_name in the configuration .yaml file.
9-
## For an example, see the build-options/sin_performance.yaml file in the BeagleV-Fire gateware repository.
109
set_parameter SOC_BD_NAME shls_test
1110
set_parameter SOC_DMA_ENGINE HARD_DMA
1211
set_parameter SOC_AXI_INITIATOR BVF_RISCV_SUBSYSTEM:FIC_0_AXI4_INITIATOR
Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,12 @@
1+
---
2+
HSS:
3+
type: git
4+
link: https://git.beagleboard.org/beaglev-fire/hart-software-services.git
5+
branch: develop-beaglev-fire
6+
board: bvf
7+
gateware:
8+
top_level_name: shls_test
9+
build-args: "M2_OPTION:NONE CAPE_OPTION:NONE SMARTHLS:../../../../../dsp/examples/riscv_tests/fft_demo/beaglev_fire"
10+
type: sources
11+
unique-design-version:
12+
Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
NAME = FFT
2+
LOCAL_CONFIG = -legup-config=config.tcl
3+
SRCS = ../sources/demo.cpp
4+
5+
# Root directory path for the HLS libraries. Modify as necessary.
6+
SHLS_LIBRARY_DIR = ../../../../..
7+
8+
USER_CXX_FLAG += -I$(SHLS_LIBRARY_DIR)/dsp/include
9+
USER_CXX_FLAG += -O3 -pg -Wall -Wno-strict-aliasing -Wno-unused-label -Wno-unknown-pragmas -Wno-attributes
10+
USER_CXX_FLAG += -I$(SHLS_ROOT_DIR)/smarthls-library
11+
12+
# Could be HLS_ALLOC_NONCACHED or HLS_ALLOC_CACHED
13+
USER_CXX_FLAG += -DDDR_REGION=HLS_ALLOC_NONCACHED
14+
15+
# AXI_TYPE: available options are:
16+
# - AXI_TARGET
17+
# - AXI_INITIATOR (default)
18+
# USER_CXX_FLAG += -DAXI_TARGET
Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
source $env(SHLS_ROOT_DIR)/examples/legup.tcl
2+
set_project PolarFireSoC MPFS095T-1FCSG325E Icicle_SoC
3+
set_parameter SOC_POLL_DELAY 1
4+
5+
# Set other parameters and constraints here
6+
# Refer to the user guide for more information: https://onlinedocs.microchip.com/oxy/GUID-AFCB5DCC-964F-4BE7-AA46-C756FA87ED7B-en-US-11/GUID-3636C6BE-3977-4267-A5DF-A514D1A46BE3.html
7+
set_parameter CLOCK_PERIOD 5
8+
set_parameter MINIMIZE_MATH_BLOCKS 1
9+
#set_resource_constraint fp_extend 27
10+
11+
#
12+
# Parameters used for SoC integration
13+
#
14+
## The SOC BD NAME is hard coded in the pre integration script /shrug
15+
set_parameter SOC_BD_NAME FIC_0_PERIPHERALS
16+
set_parameter SOC_DMA_ENGINE HARD_DMA
17+
set_parameter SOC_AXI_INITIATOR AXI2AXI_TO_HLS:AXI4_MASTER
18+
set_parameter SOC_AXI_TARGET AXI2AXI_FROM_HLS:AXI4_SLAVE
19+
set_parameter SOC_RESET ARESETN
20+
set_parameter SOC_CLOCK ACLK
21+
set_parameter SOC_FABRIC_BASE_ADDRESS 0x70000000
22+
set_parameter SOC_FABRIC_SIZE 0x400000
23+
set_parameter SOC_CPU_MEM_BASE_ADDRESS 0x80000000
24+
set_parameter SOC_CPU_MEM_SIZE 0x60000000
25+
Lines changed: 38 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,38 @@
1+
#!/bin/bash
2+
#
3+
# Usage:
4+
# ./run_libero.sh
5+
# Notes:
6+
# This script will create a directory in your SHLS project directory, create a
7+
# working directory called "work", and copy in the Discovery Kit reference
8+
# design included in SHLS.
9+
10+
set -e
11+
12+
prjDir=soc
13+
HLS_PATH=$(pwd)
14+
15+
#
16+
# Start from a clean state
17+
#
18+
rm -rf \
19+
$HLS_PATH/hls_output \
20+
work \
21+
component
22+
23+
# Copy the reference design files to the hls project directory
24+
mkdir work
25+
cp -r ../../../../../support/discovery_kit/polarfire-soc-discovery-kit-reference-design/ work
26+
cd work/polarfire-soc-discovery-kit-reference-design
27+
28+
args=SMARTHLS:$HLS_PATH
29+
args+=+SYNTHESIZE
30+
args+=+PLACEROUTE
31+
args+=+VERIFYTIMING
32+
args+=+HSS_UPDATE:1
33+
args+=+EXPORT_FPE:$prjDir
34+
libero script:MPFS_DISCOVERY_KIT_REFERENCE_DESIGN.tcl \
35+
script_args:$args \
36+
logfile:disco_kit_sin_performance.log
37+
38+
echo "ALL DONE"
Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
NAME = FFT
2+
LOCAL_CONFIG = -legup-config=config.tcl
3+
SRCS = ../sources/demo.cpp
4+
5+
# Root directory path for the HLS libraries. Modify as necessary.
6+
SHLS_LIBRARY_DIR = ../../../../..
7+
8+
USER_CXX_FLAG += -I$(SHLS_LIBRARY_DIR)/dsp/include
9+
USER_CXX_FLAG += -O3 -pg -Wall -Wno-strict-aliasing -Wno-unused-label -Wno-unknown-pragmas -Wno-attributes
10+
USER_CXX_FLAG += -I$(SHLS_ROOT_DIR)/smarthls-library
11+
12+
# Could be HLS_ALLOC_NONCACHED or HLS_ALLOC_CACHED
13+
USER_CXX_FLAG += -DDDR_REGION=HLS_ALLOC_NONCACHED
14+
15+
# AXI_TYPE: available options are:
16+
# - AXI_TARGET
17+
# - AXI_INITIATOR (default)
18+
# USER_CXX_FLAG += -DAXI_TARGET
Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
########## This file is automatically generated. Any changes to this file will be lost. ##########
2+
########## If you have your own constraints tcl file, please add it to the project ##########
3+
########## by using the "Set custom config file" constraint in the HLS Constraints dialog. ##########
4+
source $env(SHLS_ROOT_DIR)/examples/legup.tcl
5+
set_project PolarFireSoC MPFS250T Icicle_SoC
6+
7+
set_parameter CLOCK_PERIOD 10
8+
set_parameter SOC_POLL_DELAY 1

0 commit comments

Comments
 (0)