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pavelkryukovpavelkryukov
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Revert "Add orc.b (#1500)" (#1552)
This reverts commit d529d6b.
1 parent e7d0573 commit 311d8f8

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4 files changed

+50
-38
lines changed

4 files changed

+50
-38
lines changed

‎riscv-opcodes

‎simulator/func_sim/alu/shifter.h

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -127,11 +127,7 @@ struct Shifter
127127
static void gorc( Executable auto* instr) { instr->v_dst[0] = gen_or_combine( instr->v_src[0], shamt_v_src2( instr)); }
128128
static void grev( Executable auto* instr) { instr->v_dst[0] = gen_reverse( instr->v_src[0], shamt_v_src2( instr)); }
129129

130-
static void orc_b( Executable auto* instr )
131-
{
132-
static constexpr size_t gorci_orc_b_shamt = 4 | 2 | 1;
133-
instr->v_dst[0] = gen_or_combine( instr->v_src[0], gorci_orc_b_shamt);
134-
}
130+
static void gorci( Executable auto* instr ) { instr->v_dst[0] = gen_or_combine( instr->v_src[0], shamt_imm( instr)); }
135131

136132
// Bit clear, set, invert, extract
137133
static void bclr( Executable auto* instr) { instr->v_dst[0] = instr->v_src[0] & ~shamt_v_src2_mask(instr); }

‎simulator/risc_v/riscv_instr.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -257,7 +257,7 @@ static const std::vector<RISCVTableEntry<I>> cmd_desc =
257257
{'B', instr_sloi, Shifter::sloi<I>, OUT_ARITHM, '7', Imm::ARITH, { Src::RS1, Src::ZERO }, { Dst::RD }, 0, 32 | 64 },
258258
{'B', instr_grev, Shifter::grev<I>, OUT_ARITHM, ' ', Imm::NO, { Src::RS1, Src::RS2 }, { Dst::RD }, 0, 32 | 64 },
259259
{'B', instr_gorc, Shifter::gorc<I>, OUT_ARITHM, ' ', Imm::NO, { Src::RS1, Src::RS2 }, { Dst::RD }, 0, 32 | 64 },
260-
{'B', instr_orc_b, Shifter::orc_b<I>, OUT_ARITHM, ' ', Imm::NO, { Src::RS1, Src::ZERO }, { Dst::RD }, 0, 32 | 64 },
260+
{'B', instr_gorci, Shifter::gorci<I>, OUT_ARITHM, '7', Imm::ARITH, { Src::RS1, Src::ZERO }, { Dst::RD }, 0, 32 | 64 },
261261
{'B', instr_rol, Shifter::rol<I>, OUT_ARITHM, ' ', Imm::NO, { Src::RS1, Src::RS2 }, { Dst::RD }, 0, 32 | 64 },
262262
{'B', instr_ror, Shifter::ror<I>, OUT_ARITHM, ' ', Imm::NO, { Src::RS1, Src::RS2 }, { Dst::RD }, 0, 32 | 64 },
263263
{'B', instr_rori, Shifter::rori<I>, OUT_ARITHM, '7', Imm::ARITH, { Src::RS1, Src::ZERO }, { Dst::RD }, 0, 32 | 64 },

‎simulator/risc_v/t/unit_test.cpp

Lines changed: 47 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,9 @@ TEST_CASE("RISC-V bit manipulation disassembly")
8282
TEST_RV32_DISASM ( 0x28D655B3, "gorc $a1, $a2, $a3");
8383
TEST_RV32_DISASM ( 0x484F9D93, "bclri $s11, $t6, 4");
8484
TEST_RV64_DISASM ( 0x4A4F9D93, "bclri $s11, $t6, 36");
85-
TEST_RV32_DISASM ( 0x2878d513, "orc_b $a0, $a7");
85+
TEST_RV32_DISASM ( 0x28D65593, "gorci $a1, $a2, 13");
86+
TEST_RV32_DISASM ( 0x28F65593, "gorci $a1, $a2, 15");
87+
TEST_RV32_DISASM ( 0x29C65593, "gorci $a1, $a2, 28");
8688
TEST_RV32_DISASM ( 0x091815b3, "shfl $a1, $a6, $a7");
8789
TEST_RV32_DISASM ( 0x091855b3, "unshfl $a1, $a6, $a7");
8890
TEST_RV32_DISASM ( 0xAE6C633, "min $a2, $a3, $a4");
@@ -338,36 +340,50 @@ TEST_RV64_RR_OP( 4, gorc, 0xFFFFFFFF77773333, 0x8712478912441231, 0xC)
338340
TEST_RV64_RR_OP( 5, gorc, all_ones<uint64>(), 1, 0xFF)
339341
TEST_RV64_RR_OP( 6, gorc, 0xFFFF0FFFFFFF0FFF, 0x1252039112340987, 0x3)
340342

341-
TEST_RV32_RR_OP( 1, orc_b, 0x00000000, 0x00000000, 0)
342-
TEST_RV32_RR_OP( 2, orc_b, 0x000000FF, 0x00000001, 0)
343-
TEST_RV32_RR_OP( 3, orc_b, 0x000000FF, 0x00000002, 0)
344-
TEST_RV32_RR_OP( 4, orc_b, 0x000000FF, 0x00000004, 0)
345-
TEST_RV32_RR_OP( 5, orc_b, 0x000000FF, 0x00000008, 0)
346-
TEST_RV32_RR_OP( 6, orc_b, 0x000000FF, 0x00000010, 0)
347-
TEST_RV32_RR_OP( 7, orc_b, 0x000000FF, 0x00000020, 0)
348-
TEST_RV32_RR_OP( 8, orc_b, 0x000000FF, 0x00000040, 0)
349-
TEST_RV32_RR_OP( 9, orc_b, 0x000000FF, 0x00000080, 0)
350-
TEST_RV32_RR_OP( 10, orc_b, 0x0000FF00, 0x00000100, 0)
351-
TEST_RV32_RR_OP( 11, orc_b, 0x00FF0000, 0x00020000, 0)
352-
TEST_RV32_RR_OP( 12, orc_b, 0xFF000000, 0x03000000, 0)
353-
TEST_RV32_RR_OP( 13, orc_b, all_ones<uint32>(), 0x11111111, 0)
354-
TEST_RV32_RR_OP( 14, orc_b, all_ones<uint32>(), all_ones<uint32>(), 0)
355-
356-
TEST_RV64_RR_OP( 1, orc_b, 0x0000000000000000, 0x0000000000000000, 0)
357-
TEST_RV64_RR_OP( 2, orc_b, 0x00000000000000FF, 0x0000000000000001, 0)
358-
TEST_RV64_RR_OP( 3, orc_b, 0x00000000000000FF, 0x0000000000000002, 0)
359-
TEST_RV64_RR_OP( 4, orc_b, 0x00000000000000FF, 0x0000000000000004, 0)
360-
TEST_RV64_RR_OP( 5, orc_b, 0x00000000000000FF, 0x0000000000000008, 0)
361-
TEST_RV64_RR_OP( 6, orc_b, 0x00000000000000FF, 0x0000000000000010, 0)
362-
TEST_RV64_RR_OP( 7, orc_b, 0x00000000000000FF, 0x0000000000000020, 0)
363-
TEST_RV64_RR_OP( 8, orc_b, 0x00000000000000FF, 0x0000000000000040, 0)
364-
TEST_RV64_RR_OP( 9, orc_b, 0x00000000000000FF, 0x0000000000000080, 0)
365-
TEST_RV64_RR_OP( 10, orc_b, 0xFF000000000000FF, 0x2000000000000001, 0)
366-
TEST_RV64_RR_OP( 11, orc_b, 0x00FF00000000FF00, 0x0040000000000300, 0)
367-
TEST_RV64_RR_OP( 12, orc_b, 0x0000FF0000FF0000, 0x0000600000050000, 0)
368-
TEST_RV64_RR_OP( 13, orc_b, 0x000000FFFF000000, 0x0000008007000000, 0)
369-
TEST_RV64_RR_OP( 14, orc_b, all_ones<uint64>(), 0x1111111111111111, 0)
370-
TEST_RV64_RR_OP( 15, orc_b, all_ones<uint64>(), all_ones<uint64>(), 0)
343+
TEST_RV32_IMM_OP( 1, gorci, 0x00000000, 0x00000000, 7)
344+
TEST_RV32_IMM_OP( 2, gorci, 0x000000FF, 0x00000001, 7)
345+
TEST_RV32_IMM_OP( 3, gorci, 0x000000FF, 0x00000002, 7)
346+
TEST_RV32_IMM_OP( 4, gorci, 0x000000FF, 0x00000004, 7)
347+
TEST_RV32_IMM_OP( 5, gorci, 0x000000FF, 0x00000008, 7)
348+
TEST_RV32_IMM_OP( 6, gorci, 0x000000FF, 0x00000010, 7)
349+
TEST_RV32_IMM_OP( 7, gorci, 0x000000FF, 0x00000020, 7)
350+
TEST_RV32_IMM_OP( 8, gorci, 0x000000FF, 0x00000040, 7)
351+
TEST_RV32_IMM_OP( 9, gorci, 0x000000FF, 0x00000080, 7)
352+
TEST_RV32_IMM_OP( 10, gorci, 0x0000FF00, 0x00000100, 7)
353+
TEST_RV32_IMM_OP( 11, gorci, 0x00FF0000, 0x00020000, 7)
354+
TEST_RV32_IMM_OP( 12, gorci, 0xFF000000, 0x03000000, 7)
355+
TEST_RV32_IMM_OP( 13, gorci, all_ones<uint32>(), 0x11111111, 7)
356+
TEST_RV32_IMM_OP( 14, gorci, all_ones<uint32>(), all_ones<uint32>(), 7)
357+
358+
TEST_RV64_IMM_OP( 1, gorci, 0x0000000000000000, 0x0000000000000000, 7)
359+
TEST_RV64_IMM_OP( 2, gorci, 0x00000000000000FF, 0x0000000000000001, 7)
360+
TEST_RV64_IMM_OP( 3, gorci, 0x00000000000000FF, 0x0000000000000002, 7)
361+
TEST_RV64_IMM_OP( 4, gorci, 0x00000000000000FF, 0x0000000000000004, 7)
362+
TEST_RV64_IMM_OP( 5, gorci, 0x00000000000000FF, 0x0000000000000008, 7)
363+
TEST_RV64_IMM_OP( 6, gorci, 0x00000000000000FF, 0x0000000000000010, 7)
364+
TEST_RV64_IMM_OP( 7, gorci, 0x00000000000000FF, 0x0000000000000020, 7)
365+
TEST_RV64_IMM_OP( 8, gorci, 0x00000000000000FF, 0x0000000000000040, 7)
366+
TEST_RV64_IMM_OP( 9, gorci, 0x00000000000000FF, 0x0000000000000080, 7)
367+
TEST_RV64_IMM_OP( 10, gorci, 0xFF000000000000FF, 0x2000000000000001, 7)
368+
TEST_RV64_IMM_OP( 11, gorci, 0x00FF00000000FF00, 0x0040000000000300, 7)
369+
TEST_RV64_IMM_OP( 12, gorci, 0x0000FF0000FF0000, 0x0000600000050000, 7)
370+
TEST_RV64_IMM_OP( 13, gorci, 0x000000FFFF000000, 0x0000008007000000, 7)
371+
TEST_RV64_IMM_OP( 14, gorci, all_ones<uint64>(), 0x1111111111111111, 7)
372+
TEST_RV64_IMM_OP( 15, gorci, all_ones<uint64>(), all_ones<uint64>(), 7)
373+
374+
TEST_RV32_IMM_OP( 21, gorci, 0x33330000, 0x11110000, 0x1)
375+
TEST_RV32_IMM_OP( 22, gorci, 0x00AA00FF, 0x00220033, 0x2)
376+
TEST_RV32_IMM_OP( 23, gorci, 0xCCCCFFFF, 0x0C0C0F0F, 0x5)
377+
TEST_RV32_IMM_OP( 24, gorci, all_ones<uint32>(), 0x87124789, 0xC)
378+
TEST_RV32_IMM_OP( 25, gorci, all_ones<uint32>(), 1, 0xFF)
379+
TEST_RV32_IMM_OP( 26, gorci, 0xFFFF0FFF, 0x12520391, 0x3)
380+
381+
TEST_RV64_IMM_OP( 21, gorci, 0x3333333333333333, 0x1111111111111111, 0x1)
382+
TEST_RV64_IMM_OP( 22, gorci, 0x00AA00FF00550055, 0x0022003300440055, 0x2)
383+
TEST_RV64_IMM_OP( 23, gorci, 0xCCCCFFFFFFFFFFFF, 0x0C0C0F0F0A0A0B0B, 0x5)
384+
TEST_RV64_IMM_OP( 24, gorci, 0xFFFFFFFF77773333, 0x8712478912441231, 0xC)
385+
TEST_RV64_IMM_OP( 25, gorci, all_ones<uint64>(), 1, 0xFF)
386+
TEST_RV64_IMM_OP( 26, gorci, 0xFFFF0FFFFFFF0FFF, 0x1252039112340987, 0x3)
371387

372388
TEST_RV32_IMM_OP( 1, bclri, 0x7FFFFFFF, all_ones<uint32>(), 0x1F) // 31 bit cleared (max bit)
373389
TEST_RV32_IMM_OP( 2, bclri, 0xFFFFFFFE, all_ones<uint32>(), 0x00) // 0 bit cleared (min bit)

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