@@ -14,6 +14,7 @@ use crate::logging::debug_println;
1414use crate :: { get_jit_asm_ptr, DEBUG_LOG , DEBUG_LOG_BRANCH_OUT } ;
1515use std:: arch:: asm;
1616use std:: cell:: UnsafeCell ;
17+ use std:: hint:: unreachable_unchecked;
1718use std:: intrinsics:: unlikely;
1819use std:: { mem, ptr} ;
1920
@@ -111,22 +112,22 @@ impl JitRuntimeData {
111112
112113pub extern "C" fn hle_bios_uninterrupt < const CPU : CpuType > ( store_host_sp : bool ) {
113114 let asm = unsafe { get_jit_asm_ptr :: < CPU > ( ) . as_mut ( ) . unwrap_unchecked ( ) } ;
114- bios:: uninterrupt :: < CPU > ( asm. emu ) ;
115+ if DEBUG_LOG_BRANCH_OUT {
116+ asm. runtime_data . branch_out_pc = get_regs ! ( asm. emu, CPU ) . pc ;
117+ }
115118 asm. runtime_data . return_stack_ptr = 0 ;
116119 asm. runtime_data . accumulated_cycles += 3 ;
120+ bios:: uninterrupt :: < CPU > ( asm. emu ) ;
117121 if unlikely ( get_cpu_regs ! ( asm. emu, CPU ) . is_halted ( ) ) {
118- if DEBUG_LOG_BRANCH_OUT {
119- asm. runtime_data . branch_out_pc = get_regs ! ( asm. emu, CPU ) . pc ;
120- }
121122 if !store_host_sp {
122123 // r4-r12,pc since we need an even amount of registers for 8 byte alignment, in case the compiler decides to use neon instructions
123124 unsafe {
124125 asm ! (
125- "mov sp, {}" ,
126- "pop {{r4-r12,pc}}" ,
127- in( reg) asm. runtime_data. host_sp
126+ "mov sp, {}" ,
127+ "pop {{r4-r12,pc}}" ,
128+ in( reg) asm. runtime_data. host_sp
128129 ) ;
129- std :: hint :: unreachable_unchecked ( ) ;
130+ unreachable_unchecked ( ) ;
130131 }
131132 }
132133 } else {
@@ -198,7 +199,7 @@ fn emit_code_block_internal<const CPU: CpuType, const THUMB: bool>(store_host_sp
198199 block_asm. restore_reg ( Reg :: CPSR ) ;
199200 }
200201
201- // if guest_pc == 0x20b2688 {
202+ // if guest_pc == 0x2001b5e {
202203 // block_asm.bkpt(2);
203204 // }
204205
@@ -207,7 +208,7 @@ fn emit_code_block_internal<const CPU: CpuType, const THUMB: bool>(store_host_sp
207208 asm. jit_buf . current_pc = guest_pc + ( i << if THUMB { 1 } else { 2 } ) as u32 ;
208209 debug_println ! ( "{CPU:?} emitting {:?} at pc: {:x}" , asm. jit_buf. current_inst( ) , asm. jit_buf. current_pc) ;
209210
210- // if asm.jit_buf.current_pc == 0x20216e2 {
211+ // if asm.jit_buf.current_pc == 0x2001b5c {
211212 // block_asm.bkpt(1);
212213 // }
213214
@@ -217,11 +218,11 @@ fn emit_code_block_internal<const CPU: CpuType, const THUMB: bool>(store_host_sp
217218 asm. emit ( & mut block_asm) ;
218219 }
219220
220- // if DEBUG_LOG {
221- // block_asm.save_context();
222- // block_asm.call2(debug_after_exec_op::<CPU> as *const (), asm.jit_buf.current_pc, asm.jit_buf.current_inst().opcode);
223- // block_asm.restore_reg(Reg::CPSR);
224- // }
221+ if DEBUG_LOG {
222+ block_asm. save_context ( ) ;
223+ block_asm. call2 ( debug_after_exec_op :: < CPU > as * const ( ) , asm. jit_buf . current_pc , asm. jit_buf . current_inst ( ) . opcode ) ;
224+ block_asm. restore_reg ( Reg :: CPSR ) ;
225+ }
225226 }
226227
227228 let opcodes = block_asm. finalize ( guest_pc, THUMB ) ;
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