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GrarakGrarak
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Use lut for mem access
1 parent 6e8ac8d commit 22a93b4

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18 files changed

+1105
-601
lines changed

18 files changed

+1105
-601
lines changed

‎src/core/cpu.rs‎

Lines changed: 0 additions & 59 deletions
This file was deleted.

‎src/core/emu.rs‎

Lines changed: 21 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,8 @@ pub(crate) use get_mem_mut;
4141
macro_rules! get_regs {
4242
($emu:expr, $cpu:expr) => {{
4343
match $cpu {
44-
crate::core::CpuType::ARM9 => crate::core::emu::get_common!($emu).cpus.arm9.regs(),
45-
crate::core::CpuType::ARM7 => crate::core::emu::get_common!($emu).cpus.arm7.regs(),
44+
crate::core::CpuType::ARM9 => &crate::core::emu::get_common!($emu).cpus.thread_regs_arm9,
45+
crate::core::CpuType::ARM7 => &crate::core::emu::get_common!($emu).cpus.thread_regs_arm7,
4646
}
4747
}};
4848
}
@@ -51,8 +51,8 @@ pub(crate) use get_regs;
5151
macro_rules! get_regs_mut {
5252
($emu:expr, $cpu:expr) => {{
5353
match $cpu {
54-
crate::core::CpuType::ARM9 => crate::core::emu::get_common_mut!($emu).cpus.arm9.regs_mut(),
55-
crate::core::CpuType::ARM7 => crate::core::emu::get_common_mut!($emu).cpus.arm7.regs_mut(),
54+
crate::core::CpuType::ARM9 => &mut crate::core::emu::get_common_mut!($emu).cpus.thread_regs_arm9,
55+
crate::core::CpuType::ARM7 => &mut crate::core::emu::get_common_mut!($emu).cpus.thread_regs_arm7,
5656
}
5757
}};
5858
}
@@ -61,8 +61,8 @@ pub(crate) use get_regs_mut;
6161
macro_rules! get_cpu_regs {
6262
($emu:expr, $cpu:expr) => {{
6363
match $cpu {
64-
crate::core::CpuType::ARM9 => &crate::core::emu::get_common!($emu).cpus.arm9.regs().cpu,
65-
crate::core::CpuType::ARM7 => &crate::core::emu::get_common!($emu).cpus.arm7.regs().cpu,
64+
crate::core::CpuType::ARM9 => &crate::core::emu::get_regs!($emu, $cpu).cpu,
65+
crate::core::CpuType::ARM7 => &crate::core::emu::get_regs!($emu, $cpu).cpu,
6666
}
6767
}};
6868
}
@@ -71,29 +71,23 @@ pub(crate) use get_cpu_regs;
7171
macro_rules! get_cpu_regs_mut {
7272
($emu:expr, $cpu:expr) => {{
7373
match $cpu {
74-
crate::core::CpuType::ARM9 => &mut crate::core::emu::get_common_mut!($emu).cpus.arm9.regs_mut().cpu,
75-
crate::core::CpuType::ARM7 => &mut crate::core::emu::get_common_mut!($emu).cpus.arm7.regs_mut().cpu,
74+
crate::core::CpuType::ARM9 => &mut crate::core::emu::get_regs_mut!($emu, $cpu).cpu,
75+
crate::core::CpuType::ARM7 => &mut crate::core::emu::get_regs_mut!($emu, $cpu).cpu,
7676
}
7777
}};
7878
}
7979
pub(crate) use get_cpu_regs_mut;
8080

8181
macro_rules! get_cp15 {
82-
($emu:expr, $cpu:expr) => {{
83-
match $cpu {
84-
crate::core::CpuType::ARM9 => crate::core::emu::get_common!($emu).cpus.arm9.cp15(),
85-
crate::core::CpuType::ARM7 => crate::core::emu::get_common!($emu).cpus.arm7.cp15(),
86-
}
82+
($emu:expr) => {{
83+
&crate::core::emu::get_common!($emu).cpus.cp15
8784
}};
8885
}
8986
pub(crate) use get_cp15;
9087

9188
macro_rules! get_cp15_mut {
92-
($emu:expr, $cpu:expr) => {{
93-
match $cpu {
94-
crate::core::CpuType::ARM9 => crate::core::emu::get_common_mut!($emu).cpus.arm9.cp15_mut(),
95-
crate::core::CpuType::ARM7 => crate::core::emu::get_common_mut!($emu).cpus.arm7.cp15_mut(),
96-
}
89+
($emu:expr) => {{
90+
&mut crate::core::emu::get_common_mut!($emu).cpus.cp15
9791
}};
9892
}
9993
pub(crate) use get_cp15_mut;
@@ -278,7 +272,7 @@ macro_rules! get_arm7_hle_mut {
278272
pub(crate) use get_arm7_hle_mut;
279273

280274
use crate::cartridge_io::CartridgeIo;
281-
use crate::core::cpu::{CpuArm7, CpuArm9};
275+
use crate::core::cp15::Cp15;
282276
use crate::core::cycle_manager::CycleManager;
283277
use crate::core::graphics::gpu::Gpu;
284278
use crate::core::hle::arm7_hle::Arm7Hle;
@@ -287,23 +281,27 @@ use crate::core::ipc::Ipc;
287281
use crate::core::memory::cartridge::Cartridge;
288282
use crate::core::memory::mem::Memory;
289283
use crate::core::spu::SoundSampler;
284+
use crate::core::thread_regs::ThreadRegs;
290285
use crate::core::CpuType;
286+
use crate::core::CpuType::{ARM7, ARM9};
291287
use crate::settings::Settings;
292288
use crate::utils::Convert;
293289
use std::cell::UnsafeCell;
294290
use std::sync::atomic::{AtomicU16, AtomicU32};
295291
use std::sync::Arc;
296292

297293
pub struct Cpus {
298-
pub arm9: CpuArm9,
299-
pub arm7: CpuArm7,
294+
pub thread_regs_arm9: ThreadRegs,
295+
pub cp15: Cp15,
296+
pub thread_regs_arm7: ThreadRegs,
300297
}
301298

302299
impl Cpus {
303300
fn new() -> Self {
304301
Cpus {
305-
arm9: CpuArm9::new(),
306-
arm7: CpuArm7::new(),
302+
thread_regs_arm9: ThreadRegs::new(ARM9),
303+
cp15: Cp15::new(),
304+
thread_regs_arm7: ThreadRegs::new(ARM7),
307305
}
308306
}
309307
}

‎src/core/exception_handler.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ mod handler {
1717
use crate::core::CpuType;
1818

1919
pub fn handle<const CPU: CpuType, const THUMB: bool>(emu: &mut Emu, opcode: u32, vector: ExceptionVector) {
20-
if CPU == CpuType::ARM7 || get_cp15!(emu, CPU).exception_addr != 0 {
20+
if CPU == CpuType::ARM7 || get_cp15!(emu).exception_addr != 0 {
2121
match vector {
2222
ExceptionVector::SoftwareInterrupt => bios::swi::<CPU>(((opcode >> if THUMB { 0 } else { 16 }) & 0xFF) as u8, emu),
2323
ExceptionVector::NormalInterrupt => bios::interrupt::<CPU>(emu),

‎src/core/graphics/gpu_3d/registers_3d.rs‎

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -301,15 +301,15 @@ fn clip_polygon(unclipped: &[Vectori32<4>; 4], clipped: &mut [Vectorf32<4>; 10],
301301
if previous_val < -previous[3] {
302302
unsafe { *clipped.get_unchecked_mut(*size) = intersect(current, previous, current_val, previous_val) };
303303
*size += 1;
304-
clip = true;
304+
return true;
305305
}
306306

307307
unsafe { *clipped.get_unchecked_mut(*size) = *current };
308308
*size += 1;
309309
} else if previous_val >= -previous[3] {
310310
unsafe { *clipped.get_unchecked_mut(*size) = intersect(current, previous, current_val, previous_val) };
311311
*size += 1;
312-
clip = true;
312+
return true;
313313
}
314314
}
315315

@@ -526,7 +526,7 @@ impl Gpu3DRegisters {
526526
let entry = unsafe { *self.cmd_fifo.front_unchecked() };
527527
let param_count = entry.param_len;
528528

529-
if param_count as usize > self.cmd_fifo.len() {
529+
if unlikely(param_count as usize > self.cmd_fifo.len()) {
530530
break;
531531
}
532532

@@ -1473,13 +1473,16 @@ impl Gpu3DRegisters {
14731473
if self.gx_fifo == 0 {
14741474
self.gx_fifo = value & mask;
14751475
} else {
1476+
let mut param_count = self.cmd_fifo_param_count;
14761477
let len = FIFO_PARAM_COUNTS[(self.gx_fifo & 0x7F) as usize];
14771478
self.queue_entry(Entry::new_with_len(self.gx_fifo as u8, len, value & mask), emu);
1478-
self.cmd_fifo_param_count += 1;
1479+
param_count += 1;
14791480

1480-
if self.cmd_fifo_param_count == len {
1481+
if param_count == len {
14811482
self.gx_fifo >>= 8;
14821483
self.cmd_fifo_param_count = 0;
1484+
} else {
1485+
self.cmd_fifo_param_count = param_count;
14831486
}
14841487
}
14851488

‎src/core/graphics/gpu_3d/renderer_3d.rs‎

Lines changed: 21 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ use crate::utils::{rgb6_to_float8, HeapMem};
66
use bilge::prelude::*;
77
use gl::types::GLuint;
88
use static_assertions::const_assert;
9-
use std::ptr;
9+
use std::{mem, ptr};
1010

1111
#[bitsize(16)]
1212
#[derive(Copy, Clone, FromBits)]
@@ -110,22 +110,26 @@ struct Gpu3DVertex {
110110
impl From<(&Vertex, u16)> for Gpu3DVertex {
111111
fn from(value: (&Vertex, u16)) -> Self {
112112
let (vertex, polygon_index) = value;
113-
let c = rgb6_to_float8(vertex.color);
114-
115-
let [x, y, w, h] = *vertex.viewport.as_ref();
116-
let vertex_x = ((vertex.coords[0] as i64 + vertex.coords[3] as i64) * w as i64 / (vertex.coords[3] as i64 * 2) + x as i64) as i32;
117-
let vertex_y = ((-vertex.coords[1] as i64 + vertex.coords[3] as i64) * h as i64 / (vertex.coords[3] as i64 * 2) + y as i64) as i32;
118-
let vertex_z = (((vertex.coords[2] as i64) << 12) / vertex.coords[3] as i64) as i32;
119-
120-
Gpu3DVertex {
121-
coords: [
122-
vertex_x as f32 / 255f32 * 2f32 - 1f32,
123-
1f32 - vertex_y as f32 / 191f32 * 2f32,
124-
(vertex_z as f32 / 4096f32) * 0.5 - 0.5,
125-
polygon_index as f32,
126-
],
127-
color: [c.0, c.1, c.2],
128-
tex_coords: [vertex.tex_coords[0] as f32 / 16f32, vertex.tex_coords[1] as f32 / 16f32],
113+
if vertex.coords[3] != 0 {
114+
let c = rgb6_to_float8(vertex.color);
115+
116+
let [x, y, w, h] = *vertex.viewport.as_ref();
117+
let vertex_x = ((vertex.coords[0] as i64 + vertex.coords[3] as i64) * w as i64 / (vertex.coords[3] as i64 * 2) + x as i64) as i32;
118+
let vertex_y = ((-vertex.coords[1] as i64 + vertex.coords[3] as i64) * h as i64 / (vertex.coords[3] as i64 * 2) + y as i64) as i32;
119+
let vertex_z = (((vertex.coords[2] as i64) << 12) / vertex.coords[3] as i64) as i32;
120+
121+
Gpu3DVertex {
122+
coords: [
123+
vertex_x as f32 / 255f32 * 2f32 - 1f32,
124+
1f32 - vertex_y as f32 / 191f32 * 2f32,
125+
(vertex_z as f32 / 4096f32) * 0.5 - 0.5,
126+
polygon_index as f32,
127+
],
128+
color: [c.0, c.1, c.2],
129+
tex_coords: [vertex.tex_coords[0] as f32 / 16f32, vertex.tex_coords[1] as f32 / 16f32],
130+
}
131+
} else {
132+
unsafe { mem::zeroed() }
129133
}
130134
}
131135
}

‎src/core/hle/bios.rs‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ pub fn interrupt<const CPU: CpuType>(emu: &mut Emu) {
4242

4343
match CPU {
4444
ARM9 => {
45-
let pc_addr = get_cp15!(emu, ARM9).dtcm_addr + 0x3FFC;
45+
let pc_addr = get_cp15!(emu).dtcm_addr + 0x3FFC;
4646
get_regs_mut!(emu, CPU).lr = 0xFFFF0000;
4747
get_regs_mut!(emu, CPU).pc = emu.mem_read::<CPU, _>(pc_addr);
4848
}
@@ -159,7 +159,7 @@ pub fn huff_uncomp<const CPU: CpuType>(emu: &mut Emu) {
159159

160160
pub fn check_wait_flags<const CPU: CpuType>(emu: &mut Emu) {
161161
let addr = match CPU {
162-
ARM9 => get_cp15!(emu, ARM9).dtcm_addr + 0x3FF8,
162+
ARM9 => get_cp15!(emu).dtcm_addr + 0x3FF8,
163163
ARM7 => 0x3FFFFF8,
164164
};
165165
let flags = emu.mem_read::<CPU, u32>(addr);

‎src/core/memory/io_arm7.rs‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -50,4 +50,13 @@ impl IoArm7 {
5050
_ => {}
5151
}
5252
}
53+
54+
#[inline(never)]
55+
pub fn write_fixed_slice<T: Convert>(&mut self, addr_offset: u32, slice: &[T], emu: &mut Emu) {
56+
match addr_offset & 0xF00000 {
57+
0x0 if IoArm7WriteLut::is_in_range(addr_offset) => IoArm7WriteLut::write_fixed_slice(addr_offset, slice, emu),
58+
0x800000 if IoArm7WriteLutWifi::is_in_range(addr_offset) => IoArm7WriteLutWifi::write_fixed_slice(addr_offset, slice, emu),
59+
_ => {}
60+
}
61+
}
5362
}

‎src/core/memory/io_arm7_lut.rs‎

Lines changed: 42 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,10 @@
11
use crate::core::emu::{
22
get_cm, get_common, get_common_mut, get_cpu_regs, get_cpu_regs_mut, get_mem, get_spu, get_spu_mut, io_dma, io_dma_mut, io_rtc, io_rtc_mut, io_spi, io_spi_mut, io_timers, io_timers_mut, io_wifi,
3-
io_wifi_mut,
3+
io_wifi_mut, Emu,
44
};
55
use crate::core::wifi::PaketType;
66
use crate::core::CpuType::ARM7;
7+
use crate::utils::Convert;
78
use dsvita_macros::{io_read, io_write};
89

910
io_read!(
@@ -359,3 +360,43 @@ io_write!(
359360
(io16(0x80021C), |mask, value, emu| io_wifi_mut!(emu).set_w_irf_set(mask, value, emu)),
360361
]
361362
);
363+
364+
impl IoArm7WriteLut {
365+
pub fn write_fixed_slice<T: Convert>(addr: u32, slice: &[T], emu: &mut Emu) {
366+
let lut_addr = addr - Self::MIN_ADDR;
367+
let (func, write_size, offset) = unsafe { Self::_LUT.get_unchecked(lut_addr as usize) };
368+
369+
if *write_size < size_of::<T>() as u8 {
370+
for value in slice {
371+
Self::write((*value).into(), addr, size_of::<T>() as u8, emu);
372+
}
373+
} else {
374+
let mask = 0xFFFFFFFF >> ((4 - size_of::<T>()) << 3);
375+
let mask = mask << *offset;
376+
for value in slice {
377+
let value = (*value).into() << *offset;
378+
func(mask, value, emu)
379+
}
380+
}
381+
}
382+
}
383+
384+
impl IoArm7WriteLutWifi {
385+
pub fn write_fixed_slice<T: Convert>(addr: u32, slice: &[T], emu: &mut Emu) {
386+
let lut_addr = addr - Self::MIN_ADDR;
387+
let (func, write_size, offset) = unsafe { Self::_LUT.get_unchecked(lut_addr as usize) };
388+
389+
if *write_size < size_of::<T>() as u8 {
390+
for value in slice {
391+
Self::write((*value).into(), addr, size_of::<T>() as u8, emu);
392+
}
393+
} else {
394+
let mask = 0xFFFFFFFF >> ((4 - size_of::<T>()) << 3);
395+
let mask = mask << *offset;
396+
for value in slice {
397+
let value = (*value).into() << *offset;
398+
func(mask, value, emu)
399+
}
400+
}
401+
}
402+
}

‎src/core/memory/io_arm9_lut.rs‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,6 @@ use crate::core::emu::{get_cm, get_common, get_common_mut, get_cpu_regs, get_cpu
22
use crate::core::CpuType::ARM9;
33
use crate::utils::Convert;
44
use dsvita_macros::{io_read, io_write};
5-
use std::intrinsics::unlikely;
65

76
io_read!(
87
IoArm9ReadLut,
@@ -405,7 +404,7 @@ impl IoArm9WriteLut {
405404
let lut_addr = addr - Self::MIN_ADDR;
406405
let (func, write_size, offset) = unsafe { Self::_LUT.get_unchecked(lut_addr as usize) };
407406

408-
if unlikely(*write_size < size_of::<T>() as u8) {
407+
if *write_size < size_of::<T>() as u8 {
409408
for value in slice {
410409
Self::write((*value).into(), addr, size_of::<T>() as u8, emu);
411410
}

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