Skip to content

Commit f686755

Browse files
kurbecokurbeco
committed
AGS 6.2
1 parent 003b453 commit f686755

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

56 files changed

+157
-54
lines changed

‎README.md

Lines changed: 5 additions & 0 deletions

‎ags_lib/doc/amd_ags.chm

5.33 KB
Binary file not shown.

‎ags_lib/hlsl/ags_shader_intrinsics_dx12.hlsl

Lines changed: 103 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -68,33 +68,36 @@ RWByteAddressBuffer AmdExtD3DShaderIntrinsicsUAV : register(u0, AmdExtD3DShaderI
6868
* Intrinsic opcodes.
6969
***********************************************************************************************************************
7070
*/
71-
#define AmdExtD3DShaderIntrinsicsOpcode_Readfirstlane 0x01
72-
#define AmdExtD3DShaderIntrinsicsOpcode_Readlane 0x02
73-
#define AmdExtD3DShaderIntrinsicsOpcode_LaneId 0x03
74-
#define AmdExtD3DShaderIntrinsicsOpcode_Swizzle 0x04
75-
#define AmdExtD3DShaderIntrinsicsOpcode_Ballot 0x05
76-
#define AmdExtD3DShaderIntrinsicsOpcode_MBCnt 0x06
77-
#define AmdExtD3DShaderIntrinsicsOpcode_Min3U 0x07
78-
#define AmdExtD3DShaderIntrinsicsOpcode_Min3F 0x08
79-
#define AmdExtD3DShaderIntrinsicsOpcode_Med3U 0x09
80-
#define AmdExtD3DShaderIntrinsicsOpcode_Med3F 0x0a
81-
#define AmdExtD3DShaderIntrinsicsOpcode_Max3U 0x0b
82-
#define AmdExtD3DShaderIntrinsicsOpcode_Max3F 0x0c
83-
#define AmdExtD3DShaderIntrinsicsOpcode_BaryCoord 0x0d
84-
#define AmdExtD3DShaderIntrinsicsOpcode_VtxParam 0x0e
85-
#define AmdExtD3DShaderIntrinsicsOpcode_Reserved1 0x0f
86-
#define AmdExtD3DShaderIntrinsicsOpcode_Reserved2 0x10
87-
#define AmdExtD3DShaderIntrinsicsOpcode_Reserved3 0x11
88-
#define AmdExtD3DShaderIntrinsicsOpcode_WaveReduce 0x12
89-
#define AmdExtD3DShaderIntrinsicsOpcode_WaveScan 0x13
90-
#define AmdExtD3DShaderIntrinsicsOpcode_LoadDwAtAddr 0x14
91-
#define AmdExtD3DShaderIntrinsicsOpcode_DrawIndex 0x17
92-
#define AmdExtD3DShaderIntrinsicsOpcode_AtomicU64 0x18
93-
#define AmdExtD3DShaderIntrinsicsOpcode_GetWaveSize 0x19
94-
#define AmdExtD3DShaderIntrinsicsOpcode_BaseInstance 0x1a
95-
#define AmdExtD3DShaderIntrinsicsOpcode_BaseVertex 0x1b
96-
#define AmdExtD3DShaderIntrinsicsOpcode_FloatConversion 0x1c
97-
#define AmdExtD3DShaderIntrinsicsOpcode_ReadlaneAt 0x1d
71+
#define AmdExtD3DShaderIntrinsicsOpcode_Readfirstlane 0x01
72+
#define AmdExtD3DShaderIntrinsicsOpcode_Readlane 0x02
73+
#define AmdExtD3DShaderIntrinsicsOpcode_LaneId 0x03
74+
#define AmdExtD3DShaderIntrinsicsOpcode_Swizzle 0x04
75+
#define AmdExtD3DShaderIntrinsicsOpcode_Ballot 0x05
76+
#define AmdExtD3DShaderIntrinsicsOpcode_MBCnt 0x06
77+
#define AmdExtD3DShaderIntrinsicsOpcode_Min3U 0x07
78+
#define AmdExtD3DShaderIntrinsicsOpcode_Min3F 0x08
79+
#define AmdExtD3DShaderIntrinsicsOpcode_Med3U 0x09
80+
#define AmdExtD3DShaderIntrinsicsOpcode_Med3F 0x0a
81+
#define AmdExtD3DShaderIntrinsicsOpcode_Max3U 0x0b
82+
#define AmdExtD3DShaderIntrinsicsOpcode_Max3F 0x0c
83+
#define AmdExtD3DShaderIntrinsicsOpcode_BaryCoord 0x0d
84+
#define AmdExtD3DShaderIntrinsicsOpcode_VtxParam 0x0e
85+
#define AmdExtD3DShaderIntrinsicsOpcode_Reserved1 0x0f
86+
#define AmdExtD3DShaderIntrinsicsOpcode_Reserved2 0x10
87+
#define AmdExtD3DShaderIntrinsicsOpcode_Reserved3 0x11
88+
#define AmdExtD3DShaderIntrinsicsOpcode_WaveReduce 0x12
89+
#define AmdExtD3DShaderIntrinsicsOpcode_WaveScan 0x13
90+
#define AmdExtD3DShaderIntrinsicsOpcode_LoadDwAtAddr 0x14
91+
#define AmdExtD3DShaderIntrinsicsOpcode_DrawIndex 0x17
92+
#define AmdExtD3DShaderIntrinsicsOpcode_AtomicU64 0x18
93+
#define AmdExtD3DShaderIntrinsicsOpcode_GetWaveSize 0x19
94+
#define AmdExtD3DShaderIntrinsicsOpcode_BaseInstance 0x1a
95+
#define AmdExtD3DShaderIntrinsicsOpcode_BaseVertex 0x1b
96+
#define AmdExtD3DShaderIntrinsicsOpcode_FloatConversion 0x1c
97+
#define AmdExtD3DShaderIntrinsicsOpcode_ReadlaneAt 0x1d
98+
#define AmdExtD3DShaderIntrinsicsOpcode_ShaderClock 0x1f
99+
#define AmdExtD3DShaderIntrinsicsOpcode_ShaderRealtimeClock 0x20
100+
98101

99102
/**
100103
***********************************************************************************************************************
@@ -1391,6 +1394,79 @@ uint3 AmdExtD3DShaderIntrinsics_ConvertF32toF16PosInf(in float3 inVec)
13911394
}
13921395

13931396

1397+
/**
1398+
***********************************************************************************************************************
1399+
* AmdExtD3DShaderIntrinsics_ShaderClock
1400+
*
1401+
* Returns the current value of the timestamp clock. The value monotonically increments and will wrap after it
1402+
* exceeds the maximum representable value. The units are not defined and need not be constant, and the value
1403+
* is not guaranteed to be dynamically uniform across a single draw or dispatch.
1404+
*
1405+
* The function serves as a code motion barrier. Available in all shader stages.
1406+
*
1407+
***********************************************************************************************************************
1408+
*/
1409+
1410+
/**
1411+
***********************************************************************************************************************
1412+
* AmdExtD3DShaderIntrinsics_ShaderClock
1413+
***********************************************************************************************************************
1414+
*/
1415+
uint2 AmdExtD3DShaderIntrinsics_ShaderClock()
1416+
{
1417+
uint2 retVal;
1418+
1419+
uint instruction;
1420+
instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_ShaderClock,
1421+
AmdExtD3DShaderIntrinsicsOpcodePhase_0,
1422+
0);
1423+
AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, 0, 0, retVal.x);
1424+
1425+
instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_ShaderClock,
1426+
AmdExtD3DShaderIntrinsicsOpcodePhase_1,
1427+
0);
1428+
AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, 0, 0, retVal.y);
1429+
1430+
return retVal;
1431+
}
1432+
1433+
1434+
/**
1435+
***********************************************************************************************************************
1436+
* AmdExtD3DShaderIntrinsics_ShaderRealtimeClock
1437+
*
1438+
* Returns a value representing the real-time clock that is globally coherent by all invocations on the GPU.
1439+
* The units are not defined and the value will wrap after exceeding the maximum representable value.
1440+
*
1441+
* The function serves as a code motion barrier. Available in all shader stages.
1442+
*
1443+
***********************************************************************************************************************
1444+
*/
1445+
1446+
/**
1447+
***********************************************************************************************************************
1448+
* AmdExtD3DShaderIntrinsics_ShaderRealtimeClock
1449+
***********************************************************************************************************************
1450+
*/
1451+
uint2 AmdExtD3DShaderIntrinsics_ShaderRealtimeClock()
1452+
{
1453+
uint2 retVal;
1454+
1455+
uint instruction;
1456+
instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_ShaderRealtimeClock,
1457+
AmdExtD3DShaderIntrinsicsOpcodePhase_0,
1458+
0);
1459+
AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, 0, 0, retVal.x);
1460+
1461+
instruction = MakeAmdShaderIntrinsicsInstruction(AmdExtD3DShaderIntrinsicsOpcode_ShaderRealtimeClock,
1462+
AmdExtD3DShaderIntrinsicsOpcodePhase_1,
1463+
0);
1464+
AmdExtD3DShaderIntrinsicsUAV.InterlockedCompareExchange(instruction, 0, 0, retVal.y);
1465+
1466+
return retVal;
1467+
}
1468+
1469+
13941470

13951471
/**
13961472
***********************************************************************************************************************
@@ -3786,7 +3862,6 @@ uint4 AmdExtD3DShaderIntrinsics_WavePostfixMax(uint4 src)
37863862
src);
37873863
}
37883864

3789-
37903865
#if defined (AGS_RAY_HIT_TOKEN)
37913866

37923867
//=====================================================================================================================

‎ags_lib/inc/amd_ags.h

Lines changed: 16 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,13 @@
3434
/// \endinternal
3535
///
3636
/// ---------------------------------------
37+
/// What's new in AGS 6.2 since version 6.1
38+
/// ---------------------------------------
39+
/// AGS 6.2 includes the following updates:
40+
/// * Shader clock intrinsics
41+
/// * Minor improvements and fixes
42+
///
43+
/// ---------------------------------------
3744
/// What's new in AGS 6.1 since version 6.0
3845
/// ---------------------------------------
3946
/// AGS 6.1 includes the following updates:
@@ -111,7 +118,7 @@
111118
#define AMD_AGS_H
112119

113120
#define AMD_AGS_VERSION_MAJOR 6 ///< AGS major version
114-
#define AMD_AGS_VERSION_MINOR 1 ///< AGS minor version
121+
#define AMD_AGS_VERSION_MINOR 2 ///< AGS minor version
115122
#define AMD_AGS_VERSION_PATCH 0 ///< AGS patch version
116123

117124
#ifdef __cplusplus
@@ -176,7 +183,8 @@ typedef enum AGSReturnCode
176183
AGS_NO_AMD_DRIVER_INSTALLED, ///< Returned if the AMD GPU driver does not appear to be installed
177184
AGS_EXTENSION_NOT_SUPPORTED, ///< Returned if the driver does not support the requested driver extension
178185
AGS_ADL_FAILURE, ///< Failure in ADL (the AMD Display Library)
179-
AGS_DX_FAILURE ///< Failure from DirectX runtime
186+
AGS_DX_FAILURE, ///< Failure from DirectX runtime
187+
AGS_D3DDEVICE_NOT_CREATED ///< Failure due to not creating the D3D device successfully via AGS.
180188
} AGSReturnCode;
181189

182190
/// @}
@@ -511,13 +519,14 @@ typedef struct AGSDX12ReturnedParams
511519
unsigned int floatConversion : 1; ///< Supported in Radeon Software Version 20.5.1 onwards.
512520
unsigned int readLaneAt : 1; ///< Supported in Radeon Software Version 20.11.2 onwards.
513521
unsigned int rayHitToken : 1; ///< Supported in Radeon Software Version 20.11.2 onwards.
514-
unsigned int padding : 20; ///< Reserved
522+
unsigned int shaderClock : 1; ///< Supported in Radeon Software Version 23.1.1 onwards.
523+
unsigned int padding : 19; ///< Reserved
515524
} ExtensionsSupported;
516525
ExtensionsSupported extensionsSupported; ///< List of supported extensions
517526
} AGSDX12ReturnedParams;
518527

519528
/// The space id for DirectX12 intrinsic support
520-
const unsigned int AGS_DX12_SHADER_INSTRINSICS_SPACE_ID = 0x7FFF0ADE; // 2147420894
529+
const unsigned int AGS_DX12_SHADER_INTRINSICS_SPACE_ID = 0x7FFF0ADE; // 2147420894
521530

522531
///
523532
/// Function used to create a D3D12 device with additional AMD-specific initialization parameters.
@@ -528,16 +537,16 @@ const unsigned int AGS_DX12_SHADER_INSTRINSICS_SPACE_ID = 0x7FFF0ADE; // 2147420
528537
/// * The intrinsic instructions require a 5.1 shader model.
529538
/// * The Root Signature will need to reserve an extra UAV resource slot. This is not a real resource that requires allocating, it is just used to encode the intrinsic instructions.
530539
///
531-
/// The easiest way to set up the reserved UAV slot is to specify it at u0. The register space id will automatically be assumed to be \ref AGS_DX12_SHADER_INSTRINSICS_SPACE_ID.
540+
/// The easiest way to set up the reserved UAV slot is to specify it at u0. The register space id will automatically be assumed to be \ref AGS_DX12_SHADER_INTRINSICS_SPACE_ID.
532541
/// The HLSL expects this as default and the set up code would look similar to this:
533542
/// \code{.cpp}
534543
/// CD3DX12_DESCRIPTOR_RANGE range[];
535544
/// ...
536-
/// range[ 0 ].Init( D3D12_DESCRIPTOR_RANGE_TYPE_UAV, 1, 0, AGS_DX12_SHADER_INSTRINSICS_SPACE_ID ); // u0 at driver-reserved space id
545+
/// range[ 0 ].Init( D3D12_DESCRIPTOR_RANGE_TYPE_UAV, 1, 0, AGS_DX12_SHADER_INTRINSICS_SPACE_ID ); // u0 at driver-reserved space id
537546
/// \endcode
538547
///
539548
/// Newer drivers also support a user-specified slot in which case the register space id is assumed to be 0. It is important that the \ref AGSDX12ReturnedParams::ExtensionsSupported::UAVBindSlot bit is set.
540-
/// to ensure the driver can support this. If not, then u0 and \ref AGS_DX12_SHADER_INSTRINSICS_SPACE_ID must be used.
549+
/// to ensure the driver can support this. If not, then u0 and \ref AGS_DX12_SHADER_INTRINSICS_SPACE_ID must be used.
541550
/// If the driver does support this feature and a non zero slot is required, then the HLSL must also define AMD_EXT_SHADER_INTRINSIC_UAV_OVERRIDE as the matching slot value.
542551
///
543552
/// \param [in] context Pointer to a context. This is generated by \ref agsInitialize

‎ags_lib/lib/amd_ags_x64.dll

512 Bytes
Binary file not shown.

‎ags_lib/lib/amd_ags_x64.lib

0 Bytes
Binary file not shown.

‎ags_lib/lib/amd_ags_x64_2017_MD.lib

1.42 KB
Binary file not shown.

‎ags_lib/lib/amd_ags_x64_2017_MDd.lib

7.31 KB
Binary file not shown.

‎ags_lib/lib/amd_ags_x64_2017_MT.lib

1.41 KB
Binary file not shown.

‎ags_lib/lib/amd_ags_x64_2017_MTd.lib

7.22 KB
Binary file not shown.

0 commit comments

Comments
 (0)