Merge branch 'master' into 'development'

v1.0

See merge request GPUOpen-Effects/FidelityFX-SPD!3

Author: aurolou

.gitlab-ci.yml

@@ -1,7 +1,7 @@
 variables:
   SampleName: SPDSample
   GIT_SUBMODULE_STRATEGY: normal
-
+  
 stages:
   - build
   - deploy
@@ -11,22 +11,24 @@ build_dx12:
   - windows
   - amd64
   stage: build
-  artifacts:
-    untracked: true
   script:
   - 'cmake -S sample -B sample/build/DX12 -G "Visual Studio 15 2017" -A x64 -DGFX_API=DX12'
-  - 'cmake --build sample/build/DX12'
+  - 'cmake --build sample/build/DX12 --config Release'
+  artifacts:
+    paths:
+    - sample/bin/
 
 build_vk:
   tags:
   - windows
   - amd64
   stage: build
-  artifacts:
-    untracked: true
   script:
-  - 'cmake -S sample -B sample/build/Vk -G "Visual Studio 15 2017" -A x64 -DGFX_API=VK'
-  - 'cmake --build sample/build/Vk'
+  - 'cmake -S sample -B sample/build/VK -G "Visual Studio 15 2017" -A x64 -DGFX_API=VK'
+  - 'cmake --build sample/build/VK --config Release'
+  artifacts:
+    paths:
+    - sample/bin/
 
 package_sample:
   tags:
@@ -37,17 +39,19 @@ package_sample:
     - build_dx12
     - build_vk
   script:
-  - echo "Packaging build"
+    - echo "Packaging build"
+    - copy %VULKAN_SDK%\Bin\glslc.exe .\sample\bin
+    - echo cd .\sample\bin\ > %SampleName%_VK.bat
+    - echo start %SampleName%_VK.exe >> %SampleName%_VK.bat
+    - echo cd .\sample\bin\ > %SampleName%_DX12.bat
+    - echo start %SampleName%_DX12.exe >> %SampleName%_DX12.bat
   artifacts:
       name: "%SampleName%-%CI_COMMIT_TAG%-%CI_COMMIT_REF_NAME%-%CI_COMMIT_SHORT_SHA%"
       paths:
-      - LICENSE.txt
-      - sample/bin/dxcompiler.dll
-      - sample/bin/dxil.dll
-      - sample/bin/amd_ags_x64.dll
-      - sample/bin/brdfLut.dds
-      - sample/bin/%SampleName%_VK.exe
-      - sample/bin/%SampleName%_DX12.exe
-      - sample/bin/ShaderLibDX
-      - sample/bin/ShaderLibVK
-      - sample/media/
+      - "NOTICES.txt"
+      - "sample/bin/"
+      - "sample/media/"
+      - "docs/"
+      - "readme.md"
+      - "%SampleName%_VK.bat"
+      - "%SampleName%_DX12.bat"

NOTICES.txt

@@ -0,0 +1,19 @@
+Copyright (c) 2020 Advanced Micro Devices, Inc. All rights reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.

README.md

@@ -24,15 +24,12 @@ Downsampler
 - SPD CS linear sampler: uses the SPD library and for sampling the source texture a linear sampler
 
 SPD Versions
-- WaveOps: uses Intrinsics and LDS to share the data between threads - this is the recommended version
 - NO-WaveOps: uses only LDS to share the data between threads
+- WaveOps: uses Intrinsics and LDS to share the data between threads
 
 SPD Non-Packed / Packed Version
 - Non-Packed: uses fp32
 - Packed: uses fp16, reduced register pressure
 
-# Known issues
-DX12, No-WaveOps, Non-Packed: Corruptions on Nvidia when using DXC compiler.
-
 # Recommendations
 We recommend to use the WapeOps path when supported. If higher precision is not needed, you can enable the packed mode - it has less register pressure and can run a bit faster as well.

docs/FidelityFX_SPD.pdf

@@ -60,7 +60,7 @@
 
 // // global atomic counter - MUST be initialized to 0
 // // GLSL:
-// layout(std430, set=0, binding=2) buffer globalAtomicBuffer
+// layout(std430, set=0, binding=2) coherent buffer globalAtomicBuffer
 // {
 //    uint counter;
 // } globalAtomic;
@@ -69,7 +69,7 @@
 // {
 //    uint counter;
 // };
-// [[vk::binding(2)]] RWStructuredBuffer<globalAtomicBuffer> globalAtomic;
+// [[vk::binding(2)]] globallycoherent RWStructuredBuffer<globalAtomicBuffer> globalAtomic;
 
 // // [SAMPLER] add sampler
 // GLSL: layout(set=0, binding=3) uniform sampler srcSampler;
@@ -81,7 +81,7 @@
 // // GLSL:
 // layout(push_constant) uniform pushConstants {
 //    uint mips; // needed to opt out earlier if mips are < 12
-//    uint numWorkGroups; // number of total thread groups, so numWorkGroupsX * numWorkGroupsY * numWorkGroupsZ
+//    uint numWorkGroups; // number of total thread groups, so numWorkGroupsX * numWorkGroupsY * 1
 // } spdConstants;
 // // HLSL:
 // [[vk::push_constant]]

ffx-spd/ffx_spd.h

@@ -24,15 +24,12 @@ Downsampler
 - SPD CS linear sampler: uses the SPD library and for sampling the source texture a linear sampler
 
 SPD Versions
-- WaveOps: uses Intrinsics and LDS to share the data between threads - this is the recommended version
 - NO-WaveOps: uses only LDS to share the data between threads
+- WaveOps: uses Intrinsics and LDS to share the data between threads
 
 SPD Non-Packed / Packed Version
 - Non-Packed: uses fp32
 - Packed: uses fp16, reduced register pressure
 
-# Known issues
-DX12, No-WaveOps, Non-Packed: Corruptions on Nvidia when using DXC compiler.
-
 # Recommendations
 We recommend to use the WapeOps path when supported. If higher precision is not needed, you can enable the packed mode - it has less register pressure and can run a bit faster as well.

sample/README.md

@@ -142,7 +142,7 @@ namespace CAULDRON_DX12
                 1, 
                 0, 
                 D3D12_RESOURCE_FLAG_ALLOW_UNORDERED_ACCESS),
-            D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE);
+            D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE);
 
         // Create views for the mip chain
         //
@@ -172,7 +172,17 @@ namespace CAULDRON_DX12
 
     void CSDownsampler::OnDestroy()
     {
-        m_pRootSignature->Release();
+        if (m_pPipeline != NULL)
+        {
+            m_pPipeline->Release();
+            m_pPipeline = NULL;
+        }
+
+        if (m_pRootSignature != NULL)
+        {
+            m_pRootSignature->Release();
+            m_pRootSignature = NULL;
+        }
     }
 
     void CSDownsampler::Draw(ID3D12GraphicsCommandList* pCommandList)
@@ -183,7 +193,7 @@ namespace CAULDRON_DX12
         //
         for (int i = 0; i < m_mipCount; i++)
         {
-            pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE, D3D12_RESOURCE_STATE_UNORDERED_ACCESS, i));
+            pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE, D3D12_RESOURCE_STATE_UNORDERED_ACCESS, i));
 
             D3D12_GPU_VIRTUAL_ADDRESS cbHandle;
             uint32_t* pConstMem;
@@ -219,7 +229,7 @@ namespace CAULDRON_DX12
             uint32_t dispatchZ = 1;
             pCommandList->Dispatch(dispatchX, dispatchY, dispatchZ);
 
-            pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_UNORDERED_ACCESS, D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE, i));
+            pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_UNORDERED_ACCESS, D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE, i));
         }
     }
 

sample/libs/cauldron

@@ -153,7 +153,7 @@ namespace CAULDRON_DX12
                 1, 
                 0, 
                 D3D12_RESOURCE_FLAG_ALLOW_UNORDERED_ACCESS),
-            D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE);
+            D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE);
 
         // Create views for the mip chain
         //
@@ -178,12 +178,23 @@ namespace CAULDRON_DX12
 
     void SPD_CS::OnDestroyWindowSizeDependentResources()
     {
+        m_globalCounterBuffer.OnDestroy();
         m_result.OnDestroy();
     }
 
     void SPD_CS::OnDestroy()
     {
-        m_pRootSignature->Release();
+        if (m_pPipeline != NULL)
+        {
+            m_pPipeline->Release();
+            m_pPipeline = NULL;
+        }
+
+        if (m_pRootSignature != NULL)
+        {
+            m_pRootSignature->Release();
+            m_pRootSignature = NULL;
+        }
     }
 
     void SPD_CS::Draw(ID3D12GraphicsCommandList2* pCommandList)
@@ -229,13 +240,16 @@ namespace CAULDRON_DX12
         D3D12_WRITEBUFFERIMMEDIATE_PARAMETER pParams = { m_globalCounterBuffer.GetResource()->GetGPUVirtualAddress(), 0 };
         pCommandList->WriteBufferImmediate(1, &pParams, NULL);
 
-        pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_globalCounterBuffer.GetResource(), D3D12_RESOURCE_STATE_COPY_DEST, D3D12_RESOURCE_STATE_UNORDERED_ACCESS, 0));
+        D3D12_RESOURCE_BARRIER resourceBarriers[2] = {
+            CD3DX12_RESOURCE_BARRIER::Transition(m_globalCounterBuffer.GetResource(), D3D12_RESOURCE_STATE_COPY_DEST, D3D12_RESOURCE_STATE_UNORDERED_ACCESS, 0),
+            CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE, D3D12_RESOURCE_STATE_UNORDERED_ACCESS)
+        };
+        pCommandList->ResourceBarrier(2, resourceBarriers);
 
         // Dispatch
         //
-        pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE, D3D12_RESOURCE_STATE_UNORDERED_ACCESS));
         pCommandList->Dispatch(dispatchX, dispatchY, dispatchZ);
-        pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_UNORDERED_ACCESS, D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE));
+        pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_UNORDERED_ACCESS, D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE));
     }
 
     void SPD_CS::Gui()

sample/src/DX12/CSDownsampler.cpp

@@ -168,7 +168,7 @@ namespace CAULDRON_DX12
                 1, 
                 0, 
                 D3D12_RESOURCE_FLAG_ALLOW_UNORDERED_ACCESS),
-            D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE);
+            D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE);
 
         // Create views for the mip chain
         //
@@ -193,12 +193,23 @@ namespace CAULDRON_DX12
 
     void SPD_CS_Linear_Sampler::OnDestroyWindowSizeDependentResources()
     {
+        m_globalCounterBuffer.OnDestroy();
         m_result.OnDestroy();
     }
 
     void SPD_CS_Linear_Sampler::OnDestroy()
     {
-        m_pRootSignature->Release();
+        if (m_pPipeline != NULL)
+        {
+            m_pPipeline->Release();
+            m_pPipeline = NULL;
+        }
+
+        if (m_pRootSignature != NULL)
+        {
+            m_pRootSignature->Release();
+            m_pRootSignature = NULL;
+        }
     }
 
     void SPD_CS_Linear_Sampler::Draw(ID3D12GraphicsCommandList2* pCommandList)
@@ -246,13 +257,16 @@ namespace CAULDRON_DX12
         D3D12_WRITEBUFFERIMMEDIATE_PARAMETER pParams = { m_globalCounterBuffer.GetResource()->GetGPUVirtualAddress(), 0 };
         pCommandList->WriteBufferImmediate(1, &pParams, NULL);
 
-        pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_globalCounterBuffer.GetResource(), D3D12_RESOURCE_STATE_COPY_DEST, D3D12_RESOURCE_STATE_UNORDERED_ACCESS, 0));
+        D3D12_RESOURCE_BARRIER resourceBarriers[2] = {
+            CD3DX12_RESOURCE_BARRIER::Transition(m_globalCounterBuffer.GetResource(), D3D12_RESOURCE_STATE_COPY_DEST, D3D12_RESOURCE_STATE_UNORDERED_ACCESS, 0),
+            CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE, D3D12_RESOURCE_STATE_UNORDERED_ACCESS)
+        };
+        pCommandList->ResourceBarrier(2, resourceBarriers);
 
         // Dispatch
         //
-        pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE, D3D12_RESOURCE_STATE_UNORDERED_ACCESS));
         pCommandList->Dispatch(dispatchX, dispatchY, dispatchZ);
-        pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_UNORDERED_ACCESS, D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE));
+        pCommandList->ResourceBarrier(1, &CD3DX12_RESOURCE_BARRIER::Transition(m_result.GetResource(), D3D12_RESOURCE_STATE_UNORDERED_ACCESS, D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE | D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE));
     }
 
     void SPD_CS_Linear_Sampler::Gui()

sample/src/DX12/SPD_CS.cpp

@@ -42,7 +42,7 @@ struct globalAtomicBuffer
 {
     uint counter;
 };
-RWStructuredBuffer<globalAtomicBuffer> globalAtomic :register(u1);
+globallycoherent RWStructuredBuffer<globalAtomicBuffer> globalAtomic :register(u1);
 
 #define A_GPU
 #define A_HLSL
@@ -52,27 +52,47 @@ RWStructuredBuffer<globalAtomicBuffer> globalAtomic :register(u1);
 groupshared AU1 spd_counter;
 
 #ifndef SPD_PACKED_ONLY
-groupshared AF4 spd_intermediate[16][16];
+groupshared AF1 spd_intermediateR[16][16];
+groupshared AF1 spd_intermediateG[16][16];
+groupshared AF1 spd_intermediateB[16][16];
+groupshared AF1 spd_intermediateA[16][16];
 AF4 SpdLoadSourceImage(AF2 tex){return imgSrc[tex];}
 AF4 SpdLoad(ASU2 tex){return imgDst[5][tex];}
 void SpdStore(ASU2 pix, AF4 outValue, AU1 index){imgDst[index][pix] = outValue;}
 void SpdIncreaseAtomicCounter(){InterlockedAdd(globalAtomic[0].counter, 1, spd_counter);}
 AU1 SpdGetAtomicCounter(){return spd_counter;}
-AF4 SpdLoadIntermediate(AU1 x, AU1 y){return spd_intermediate[x][y];}
-void SpdStoreIntermediate(AU1 x, AU1 y, AF4 value){spd_intermediate[x][y] = value;}
+AF4 SpdLoadIntermediate(AU1 x, AU1 y){
+    return AF4(
+    spd_intermediateR[x][y], 
+    spd_intermediateG[x][y], 
+    spd_intermediateB[x][y], 
+    spd_intermediateA[x][y]);}
+void SpdStoreIntermediate(AU1 x, AU1 y, AF4 value){
+    spd_intermediateR[x][y] = value.x;
+    spd_intermediateG[x][y] = value.y;
+    spd_intermediateB[x][y] = value.z;
+    spd_intermediateA[x][y] = value.w;}
 AF4 SpdReduce4(AF4 v0, AF4 v1, AF4 v2, AF4 v3){return (v0+v1+v2+v3)*0.25;}
 #endif
 
 // define fetch and store functions Packed
 #ifdef A_HALF
-groupshared AH4 spd_intermediate[16][16];
+groupshared AH2 spd_intermediateRG[16][16];
+groupshared AH2 spd_intermediateBA[16][16];
 AH4 SpdLoadSourceImageH(AF2 tex){return AH4(imgSrc[tex]);}
 AH4 SpdLoadH(ASU2 p){return AH4(imgDst[5][p]);}
 void SpdStoreH(ASU2 p, AH4 value, AU1 mip){imgDst[mip][p] = AF4(value);}
 void SpdIncreaseAtomicCounter(){InterlockedAdd(globalAtomic[0].counter, 1, spd_counter);}
 AU1 SpdGetAtomicCounter(){return spd_counter;}
-AH4 SpdLoadIntermediateH(AU1 x, AU1 y){return spd_intermediate[x][y];}
-void SpdStoreIntermediateH(AU1 x, AU1 y, AH4 value){spd_intermediate[x][y] = value;}
+AH4 SpdLoadIntermediateH(AU1 x, AU1 y){
+    return AH4(
+    spd_intermediateRG[x][y].x,
+    spd_intermediateRG[x][y].y,
+    spd_intermediateBA[x][y].x,
+    spd_intermediateBA[x][y].y);}
+void SpdStoreIntermediateH(AU1 x, AU1 y, AH4 value){
+    spd_intermediateRG[x][y] = value.xy;
+    spd_intermediateBA[x][y] = value.zw;}
 AH4 SpdReduce4H(AH4 v0, AH4 v1, AH4 v2, AH4 v3){return (v0+v1+v2+v3)*AH1(0.25);}
 #endif