Add support for the Orange Crab #826
Replies: 13 comments
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The first step is to support it in Apio. Icestudio just call apio for performing the synthesis. I've opened this issue in apio |
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I've commited and initial support for the board. The .pcf file is missing. @jmi2k do you know if this file is available or should we wait for it? |
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ok, I've found a very simple .pcf file here: https://github.com/gregdavill/OrangeCrab-examples/tree/master/verilog/blink It is not complete, just the clk and three leds but i can use it for the initial testings |
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I've been able to synthesize this hello world example ok, but I cannot test on a real board (because I do not have an orangecrab board) It would be great if you could test it (@jmi2k) . You have to use icestudio from the develop branch |
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I don't have the board yet, I'm still awaiting for my group buy unit to come. Let's see if someone with a prototype can provide some help. |
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I've updated the pinout.pcf following this as reference, but I don't know how to generate the pinout.json (or even if it's required!). Can you help me? |
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Yes! Great! could you emit a pull-req with the .pcf file? For generating the pinout.json there a script in the app/resources/boards/ called generator.py for converting from .pcf to .json... but I am not sure if it work with the new .pcf sintax (used by nextpnr). I have to try it and modify the script accordingly |
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ECP5 does not use PCF files at all, it uses LPF files (whether with nextpnr or with Diamond). |
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I've uploaded the PR, with the file extension changed to .lpf. I've followed the ULX3S pinout as reference, so the syntax should be right. |
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Gave this a spin. It's not working exactly right. I can compile an example project, but loading it fails. The main issue is that my PC's has an internal dfu device. So I get an error at the programmer saying that I need to specify a device.
This can be done in the following ways:
Or in the bitstream add a dfu-suffix
The programmer is also currently using |
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That should be solved in apio (which is the backend). Icestudio uses apio for building and uploading I will re-open the issue in apio |
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I've generted the pinout.json file. Now the pins are accessible from Icestudio. The bitstream generation is working fine |
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Hello! I am reorganizing the issues, trying to give more visibility and be able to better organize and prioritize the work and my roadmap (I will publish it very soon), I am converting some issues that are new feature requests as ideas on Github discussions. Thanks for understanding. |
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I've backed this board, the Orange Crab, based on the ECP5-25F, which would benefit greatly from Icestudio support. It features a Feather-compatible pinout, 1 Gbit of DRAM and a built-in ADC. It has even successfully booted Linux out of a Litex SoC RISC-V core.
As the ULX3S board became supported by Icestudio (based on the ECP-5), the base support for the toolchain should be there, so there is no need to start from scratch.
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