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Add linear and sinc a96
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+81
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benches/bench1.rs

Lines changed: 81 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
use simple_src::{sinc::Manager, Convert};
1+
use simple_src::{linear, sinc, Convert};
22

33
fn main() {
44
divan::main();
@@ -26,6 +26,15 @@ impl ToString for Conv {
2626
}
2727
}
2828

29+
const R44K48K: f64 = 48000.0 / 44100.0;
30+
const R44K96K: f64 = 96000.0 / 44100.0;
31+
const R48K44K: f64 = 44100.0 / 48000.0;
32+
const R48K96K: f64 = 2.0;
33+
const R96K44K: f64 = 44100.0 / 96000.0;
34+
const R96K48K: f64 = 0.5;
35+
const TRANS44K: f64 = 2050.0 / 22050.0;
36+
const TRANS48K: f64 = 4000.0 / 24000.0;
37+
2938
impl Conv {
3039
fn sample_num_10ms(&self) -> usize {
3140
match self {
@@ -34,31 +43,76 @@ impl Conv {
3443
_ => 960,
3544
}
3645
}
46+
47+
fn ratio(&self) -> f64 {
48+
match self {
49+
Conv::C44k48k => R44K48K,
50+
Conv::C44k96k => R44K96K,
51+
Conv::C48k44k => R48K44K,
52+
Conv::C48k96k => R48K96K,
53+
Conv::C96k44k => R96K44K,
54+
Conv::C96k48k => R96K48K,
55+
}
56+
}
57+
58+
fn trans_width(&self) -> f64 {
59+
match self {
60+
Conv::C48k96k | Conv::C96k48k => TRANS48K,
61+
_ => TRANS44K,
62+
}
63+
}
3764
}
3865

39-
const R44K48K: f64 = 48000.0 / 44100.0;
40-
const R44K96K: f64 = 96000.0 / 44100.0;
41-
const R48K44K: f64 = 44100.0 / 48000.0;
42-
const R48K96K: f64 = 2.0;
43-
const R96K44K: f64 = 44100.0 / 96000.0;
44-
const R96K48K: f64 = 0.5;
45-
const TRANS44K: f64 = 2050.0 / 22050.0;
46-
const TRANS48K: f64 = 4000.0 / 24000.0;
66+
#[divan::bench(
67+
name="0. linear 1s",
68+
args=[Conv::C44k48k, Conv::C44k96k, Conv::C48k44k, Conv::C48k96k, Conv::C96k44k, Conv::C96k48k],
69+
sample_count=1000,
70+
)]
71+
fn linear_1s(bencher: divan::Bencher, conv: &Conv) {
72+
let manager = linear::Manager::new(conv.ratio()).unwrap();
73+
let sample_num = conv.sample_num_10ms() * 100;
74+
bencher.bench_local(move || {
75+
let iter = (0..).map(|x| x as f64).into_iter();
76+
for s in manager.converter().process(iter).take(sample_num) {
77+
divan::black_box(s);
78+
}
79+
})
80+
}
81+
82+
#[divan::bench(
83+
name="1. init a96",
84+
args=[Conv::C44k48k, Conv::C44k96k, Conv::C48k44k, Conv::C48k96k, Conv::C96k44k, Conv::C96k48k]
85+
)]
86+
fn init_a96(conv: &Conv) -> sinc::Manager {
87+
sinc::Manager::new(conv.ratio(), 96.0, 128, conv.trans_width()).unwrap()
88+
}
89+
90+
#[divan::bench(
91+
name="1. proc a96 10ms",
92+
args=[Conv::C44k48k, Conv::C44k96k, Conv::C48k44k, Conv::C48k96k, Conv::C96k44k, Conv::C96k48k],
93+
sample_count=1000,
94+
)]
95+
fn proc_a96_10ms(bencher: divan::Bencher, conv: &Conv) {
96+
let manager = init_a96(conv);
97+
let sample_num = conv.sample_num_10ms();
98+
bencher.bench_local(move || {
99+
let iter = (0..).map(|x| x as f64).into_iter();
100+
for s in manager.converter().process(iter).take(sample_num) {
101+
divan::black_box(s);
102+
}
103+
})
104+
}
47105

48-
#[divan::bench(args=[Conv::C44k48k, Conv::C44k96k, Conv::C48k44k, Conv::C48k96k, Conv::C96k44k, Conv::C96k48k])]
49-
fn init_a120(conv: &Conv) -> Manager {
50-
let m = match conv {
51-
Conv::C44k48k => Manager::new(R44K48K, 120.0, 512, TRANS44K),
52-
Conv::C44k96k => Manager::new(R44K96K, 120.0, 512, TRANS44K),
53-
Conv::C48k44k => Manager::new(R48K44K, 120.0, 512, TRANS44K),
54-
Conv::C48k96k => Manager::new(R48K96K, 120.0, 512, TRANS48K),
55-
Conv::C96k44k => Manager::new(R96K44K, 120.0, 512, TRANS44K),
56-
Conv::C96k48k => Manager::new(R96K48K, 120.0, 512, TRANS48K),
57-
};
58-
m.unwrap()
106+
#[divan::bench(
107+
name="2. init a120",
108+
args=[Conv::C44k48k, Conv::C44k96k, Conv::C48k44k, Conv::C48k96k, Conv::C96k44k, Conv::C96k48k]
109+
)]
110+
fn init_a120(conv: &Conv) -> sinc::Manager {
111+
sinc::Manager::new(conv.ratio(), 120.0, 512, conv.trans_width()).unwrap()
59112
}
60113

61114
#[divan::bench(
115+
name="2. proc a120 10ms",
62116
args=[Conv::C44k48k, Conv::C44k96k, Conv::C48k44k, Conv::C48k96k, Conv::C96k44k, Conv::C96k48k],
63117
sample_count=1000,
64118
)]
@@ -73,20 +127,16 @@ fn proc_a120_10ms(bencher: divan::Bencher, conv: &Conv) {
73127
})
74128
}
75129

76-
#[divan::bench(args=[Conv::C44k48k, Conv::C44k96k, Conv::C48k44k, Conv::C48k96k, Conv::C96k44k, Conv::C96k48k])]
77-
fn init_a144(conv: &Conv) -> Manager {
78-
let m = match conv {
79-
Conv::C44k48k => Manager::new(R44K48K, 144.0, 2048, TRANS44K),
80-
Conv::C44k96k => Manager::new(R44K96K, 144.0, 2048, TRANS44K),
81-
Conv::C48k44k => Manager::new(R48K44K, 144.0, 2048, TRANS44K),
82-
Conv::C48k96k => Manager::new(R48K96K, 144.0, 2048, TRANS48K),
83-
Conv::C96k44k => Manager::new(R96K44K, 144.0, 2048, TRANS44K),
84-
Conv::C96k48k => Manager::new(R96K48K, 144.0, 2048, TRANS48K),
85-
};
86-
m.unwrap()
130+
#[divan::bench(
131+
name="3. init a144",
132+
args=[Conv::C44k48k, Conv::C44k96k, Conv::C48k44k, Conv::C48k96k, Conv::C96k44k, Conv::C96k48k]
133+
)]
134+
fn init_a144(conv: &Conv) -> sinc::Manager {
135+
sinc::Manager::new(conv.ratio(), 144.0, 2048, conv.trans_width()).unwrap()
87136
}
88137

89138
#[divan::bench(
139+
name="3. proc a144 10ms",
90140
args=[Conv::C44k48k, Conv::C44k96k, Conv::C48k44k, Conv::C48k96k, Conv::C96k44k, Conv::C96k48k],
91141
sample_count=1000,
92142
)]

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